#define _HNS3_ETHDEV_H_
#include <pthread.h>
-#include <sys/time.h>
#include <ethdev_driver.h>
#include <rte_byteorder.h>
#include <rte_io.h>
#include "hns3_fdir.h"
#include "hns3_stats.h"
#include "hns3_tm.h"
+#include "hns3_flow.h"
/* Vendor ID */
#define PCI_VENDOR_ID_HUAWEI 0x19e5
#define HNS3_MAX_NON_TSO_BD_PER_PKT 8
#define HNS3_MAX_TSO_BD_PER_PKT 63
#define HNS3_MAX_FRAME_LEN 9728
-#define HNS3_VLAN_TAG_SIZE 4
#define HNS3_DEFAULT_RX_BUF_LEN 2048
#define HNS3_MAX_BD_PAYLEN (1024 * 1024 - 1)
#define HNS3_MAX_TSO_HDR_SIZE 512
#define HNS3_MAX_LRO_SIZE 64512
#define HNS3_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + HNS3_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define HNS3_PKTLEN_TO_MTU(pktlen) ((pktlen) - HNS3_ETH_OVERHEAD)
#define HNS3_MAX_MTU (HNS3_MAX_FRAME_LEN - HNS3_ETH_OVERHEAD)
#define HNS3_DEFAULT_MTU 1500UL
uint8_t tc_sch_mode; /* 0: sp; 1: dwrr */
uint8_t pgid;
uint32_t bw_limit;
- uint8_t up_to_tc_map; /* user priority maping on the TC */
+ uint8_t up_to_tc_map; /* user priority mapping on the TC */
};
struct hns3_dcb_info {
struct hns3_cfg {
uint8_t tc_num;
- uint16_t tqp_desc_num;
- uint16_t rx_buf_len;
uint16_t rss_size_max;
uint8_t phy_addr;
uint8_t media_type;
struct hns3_mac {
uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
- bool default_addr_setted; /* whether default addr(mac_addr) is set */
uint8_t media_type;
uint8_t phy_addr;
- uint8_t link_duplex : 1; /* ETH_LINK_[HALF/FULL]_DUPLEX */
- uint8_t link_autoneg : 1; /* ETH_LINK_[AUTONEG/FIXED] */
- uint8_t link_status : 1; /* ETH_LINK_[DOWN/UP] */
- uint32_t link_speed; /* ETH_SPEED_NUM_ */
+ uint8_t link_duplex : 1; /* RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
+ uint8_t link_autoneg : 1; /* RTE_ETH_LINK_[AUTONEG/FIXED] */
+ uint8_t link_status : 1; /* RTE_ETH_LINK_[DOWN/UP] */
+ uint32_t link_speed; /* RTE_ETH_SPEED_NUM_ */
/*
* Some firmware versions support only the SFP speed query. In addition
* to the SFP speed query, some firmware supports the query of the speed
struct hns3_wait_data *wait_data;
};
+struct hns3_hw_ops {
+ int (*add_mc_mac_addr)(struct hns3_hw *hw,
+ struct rte_ether_addr *mac_addr);
+ int (*del_mc_mac_addr)(struct hns3_hw *hw,
+ struct rte_ether_addr *mac_addr);
+ int (*add_uc_mac_addr)(struct hns3_hw *hw,
+ struct rte_ether_addr *mac_addr);
+ int (*del_uc_mac_addr)(struct hns3_hw *hw,
+ struct rte_ether_addr *mac_addr);
+ int (*bind_ring_with_vector)(struct hns3_hw *hw, uint16_t vector_id,
+ bool en, enum hns3_ring_type queue_type,
+ uint16_t queue_id);
+};
+
#define HNS3_INTR_MAPPING_VEC_RSV_ONE 0
#define HNS3_INTR_MAPPING_VEC_ALL 1
* enable Rx interrupt.
*
* - HNS3_INTR_MAPPING_VEC_ALL
- * PMD driver can map/unmmap all interrupt vectors with queues When
- * Rx interrupt in enabled.
+ * PMD can map/unmmap all interrupt vectors with queues when
+ * Rx interrupt is enabled.
*/
uint8_t mapping_mode;
/*
struct hns3_cmq cmq;
struct hns3_mbx_resp_status mbx_resp; /* mailbox response */
struct hns3_mac mac;
+ /*
+ * This flag indicates dev_set_link_down() API is called, and is cleared
+ * by dev_set_link_up() or dev_start().
+ */
+ bool set_link_down;
unsigned int secondary_cnt; /* Number of secondary processes init'd. */
struct hns3_tqp_stats tqp_stats;
/* Include Mac stats | Rx stats | Tx stats */
struct hns3_mac_stats mac_stats;
+ uint32_t mac_stats_reg_num;
struct hns3_rx_missed_stats imissed_stats;
uint64_t oerror_stats;
uint32_t fw_version;
uint16_t intr_tqps_num; /* num queue pairs mapping interrupt */
uint16_t rss_size_max; /* HW defined max RSS task queue */
uint16_t rx_buf_len; /* hold min hardware rx buf len */
- uint16_t num_tx_desc; /* desc num of per tx queue */
- uint16_t num_rx_desc; /* desc num of per rx queue */
uint32_t mng_entry_num; /* number of manager table entry */
uint32_t mac_entry_num; /* number of mac-vlan table entry */
/*
* vlan mode.
* value range:
- * HNS3_SW_SHIFT_AND_DISCARD_MODE/HNS3_HW_SHFIT_AND_DISCARD_MODE
+ * HNS3_SW_SHIFT_AND_DISCARD_MODE/HNS3_HW_SHIFT_AND_DISCARD_MODE
*
* - HNS3_SW_SHIFT_AND_DISCARD_MODE
* For some versions of hardware network engine, because of the
- * hardware limitation, PMD driver needs to detect the PVID status
- * to work with haredware to implement PVID-related functions.
+ * hardware limitation, PMD needs to detect the PVID status
+ * to work with hardware to implement PVID-related functions.
* For example, driver need discard the stripped PVID tag to ensure
* the PVID will not report to mbuf and shift the inserted VLAN tag
* to avoid port based VLAN covering it.
*
* - HNS3_HW_SHIT_AND_DISCARD_MODE
- * PMD driver does not need to process PVID-related functions in
+ * PMD does not need to process PVID-related functions in
* I/O process, Hardware will adjust the sequence between port based
* VLAN tag and BD VLAN tag automatically and VLAN tag stripped by
* PVID will be invisible to driver. And in this mode, hns3 is able
* - HNS3_SPECIAL_PORT_SW_CKSUM_MODE
* In this mode, HW can not do checksum for special UDP port like
* 4789, 4790, 6081 for non-tunnel UDP packets and UDP tunnel
- * packets without the PKT_TX_TUNEL_MASK in the mbuf. So, PMD need
+ * packets without the RTE_MBUF_F_TX_TUNEL_MASK in the mbuf. So, PMD need
* do the checksum for these packets to avoid a checksum error.
*
* - HNS3_SPECIAL_PORT_HW_CKSUM_MODE
struct hns3_rss_filter_list flow_rss_list; /* flow RSS rule list */
struct hns3_flow_mem_list flow_list;
+ struct hns3_hw_ops ops;
+
/*
* PMD setup and configuration is not thread safe. Since it is not
* performance sensitive, it is better to guarantee thread-safety
enum hns3_mp_req_type {
HNS3_MP_REQ_START_RXTX = 1,
HNS3_MP_REQ_STOP_RXTX,
+ HNS3_MP_REQ_START_TX,
+ HNS3_MP_REQ_STOP_TX,
HNS3_MP_REQ_MAX
};
-/* Pameters for IPC. */
+/* Parameters for IPC. */
struct hns3_mp_param {
enum hns3_mp_req_type type;
int port_id;
uint8_t tc_max; /* max number of tc driver supported */
uint8_t local_max_tc; /* max number of local tc */
uint8_t pfc_max;
- uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */
uint16_t pause_time;
bool support_fc_autoneg; /* support FC autonegotiate */
bool support_multi_tc_pause;
uint32_t tx_func_hint;
uint64_t dev_caps_mask;
+ uint16_t mbx_time_limit_ms; /* wait time for mbx message */
struct hns3_ptype_table ptype_tbl __rte_cache_aligned;
};
-enum {
- HNS3_IO_FUNC_HINT_NONE = 0,
- HNS3_IO_FUNC_HINT_VEC,
- HNS3_IO_FUNC_HINT_SVE,
- HNS3_IO_FUNC_HINT_SIMPLE,
- HNS3_IO_FUNC_HINT_COMMON
-};
-
#define HNS3_DEVARG_RX_FUNC_HINT "rx_func_hint"
#define HNS3_DEVARG_TX_FUNC_HINT "tx_func_hint"
#define HNS3_DEVARG_DEV_CAPS_MASK "dev_caps_mask"
+#define HNS3_DEVARG_MBX_TIME_LIMIT_MS "mbx_time_limit_ms"
+
enum {
HNS3_DEV_SUPPORT_DCB_B,
HNS3_DEV_SUPPORT_COPPER_B,
HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B,
};
-#define hns3_dev_dcb_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B)
-
-/* Support copper media type */
-#define hns3_dev_copper_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_COPPER_B)
-
-/* Support the queue region action rule of flow directory */
-#define hns3_dev_fd_queue_region_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B)
-
-/* Support PTP timestamp offload */
-#define hns3_dev_ptp_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_PTP_B)
-
-/* Support to Independently enable/disable/reset Tx or Rx queues */
-#define hns3_dev_indep_txrx_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_INDEP_TXRX_B)
-
-#define hns3_dev_stash_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_STASH_B)
-
-#define hns3_dev_rxd_adv_layout_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B)
-
-#define hns3_dev_outer_udp_cksum_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B)
-
-#define hns3_dev_ras_imp_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RAS_IMP_B)
-
-#define hns3_dev_tx_push_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B)
-
-#define hns3_dev_tm_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TM_B)
-
-#define hns3_dev_vf_vlan_flt_supported(hw) \
- hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B)
+#define hns3_dev_get_support(hw, _name) \
+ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_##_name##_B)
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
} \
} while (0)
-#define MSEC_PER_SEC 1000L
-#define USEC_PER_MSEC 1000L
-
-void hns3_clock_gettime(struct timeval *tv);
-uint64_t hns3_clock_calctime_ms(struct timeval *tv);
-uint64_t hns3_clock_gettime_ms(void);
-
static inline uint64_t
hns3_atomic_test_bit(unsigned int nr, volatile uint64_t *addr)
{
return __atomic_fetch_and(addr, ~mask, __ATOMIC_RELAXED) & mask;
}
+uint32_t hns3_get_speed_capa(struct hns3_hw *hw);
+
int hns3_buffer_alloc(struct hns3_hw *hw);
-int hns3_dev_flow_ops_get(struct rte_eth_dev *dev,
- const struct rte_flow_ops **ops);
bool hns3_is_reset_pending(struct hns3_adapter *hns);
bool hns3vf_is_reset_pending(struct hns3_adapter *hns);
void hns3_update_linkstatus_and_event(struct hns3_hw *hw, bool query);
-void hns3_ether_format_addr(char *buf, uint16_t size,
- const struct rte_ether_addr *ether_addr);
-int hns3_dev_infos_get(struct rte_eth_dev *eth_dev,
- struct rte_eth_dev_info *info);
void hns3vf_update_link_status(struct hns3_hw *hw, uint8_t link_status,
uint32_t link_speed, uint8_t link_duplex);
-void hns3_parse_devargs(struct rte_eth_dev *dev);
void hns3vf_update_push_lsc_cap(struct hns3_hw *hw, bool supported);
+
int hns3_restore_ptp(struct hns3_adapter *hns);
int hns3_mbuf_dyn_rx_timestamp_register(struct rte_eth_dev *dev,
struct rte_eth_conf *conf);
int hns3_timesync_write_time(struct rte_eth_dev *dev,
const struct timespec *ts);
int hns3_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+int hns3_eth_dev_priv_dump(struct rte_eth_dev *dev, FILE *file);
static inline bool
is_reset_pending(struct hns3_adapter *hns)
return ret;
}
-static inline uint64_t
-hns3_txvlan_cap_get(struct hns3_hw *hw)
-{
- if (hw->port_base_vlan_cfg.state)
- return DEV_TX_OFFLOAD_VLAN_INSERT;
- else
- return DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_QINQ_INSERT;
-}
-
#endif /* _HNS3_ETHDEV_H_ */
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