net/ice: clean input set macro definition

[dpdk.git] / drivers / net / hns3 / hns3_ethdev.h

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 8d6b8cd..932600d 100644 (file)
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -6,13 +6,17 @@
 #define _HNS3_ETHDEV_H_
 
 #include <sys/time.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
+#include <rte_byteorder.h>
+#include <rte_io.h>
+#include <rte_spinlock.h>
 
 #include "hns3_cmd.h"
 #include "hns3_mbx.h"
 #include "hns3_rss.h"
 #include "hns3_fdir.h"
 #include "hns3_stats.h"
+#include "hns3_tm.h"
 
 /* Vendor ID */
 #define PCI_VENDOR_ID_HUAWEI                   0x19e5
@@ -176,6 +180,11 @@ struct hns3_mac {
        uint8_t link_autoneg : 1; /* ETH_LINK_[AUTONEG/FIXED] */
        uint8_t link_status  : 1; /* ETH_LINK_[DOWN/UP] */
        uint32_t link_speed;      /* ETH_SPEED_NUM_ */
+       uint32_t supported_capa;  /* supported capability for current media */
+       uint32_t advertising;     /* advertised capability in the local part */
+       /* advertised capability in the link partner */
+       uint32_t lp_advertising;
+       uint8_t support_autoneg;
 };
 
 struct hns3_fake_queue_data {
@@ -348,11 +357,11 @@ enum hns3_schedule {
 
 struct hns3_reset_data {
        enum hns3_reset_stage stage;
-       rte_atomic16_t schedule;
+       uint16_t schedule;
        /* Reset flag, covering the entire reset process */
-       rte_atomic16_t resetting;
+       uint16_t resetting;
        /* Used to disable sending cmds during reset */
-       rte_atomic16_t disable_cmd;
+       uint16_t disable_cmd;
        /* The reset level being processed */
        enum hns3_reset_level level;
        /* Reset level set, each bit represents a reset level */
@@ -430,6 +439,7 @@ struct hns3_hw {
        struct hns3_tqp_stats tqp_stats;
        /* Include Mac stats | Rx stats | Tx stats */
        struct hns3_mac_stats mac_stats;
+       struct hns3_rx_missed_stats imissed_stats;
        uint32_t fw_version;
 
        uint16_t num_msi;
@@ -657,8 +667,13 @@ struct hns3_mp_param {
 #define HNS3_OL2TBL_NUM        4
 #define HNS3_OL3TBL_NUM        16
 #define HNS3_OL4TBL_NUM        16
+#define HNS3_PTYPE_NUM 256
 
 struct hns3_ptype_table {
+       /*
+        * The next fields used to calc packet-type by the
+        * L3_ID/L4_ID/OL3_ID/OL4_ID from the Rx descriptor.
+        */
        uint32_t l2l3table[HNS3_L2TBL_NUM][HNS3_L3TBL_NUM];
        uint32_t l4table[HNS3_L4TBL_NUM];
        uint32_t inner_l2table[HNS3_L2TBL_NUM];
@@ -667,6 +682,13 @@ struct hns3_ptype_table {
        uint32_t ol2table[HNS3_OL2TBL_NUM];
        uint32_t ol3table[HNS3_OL3TBL_NUM];
        uint32_t ol4table[HNS3_OL4TBL_NUM];
+
+       /*
+        * The next field used to calc packet-type by the PTYPE from the Rx
+        * descriptor, it functions only when firmware report the capability of
+        * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it.
+        */
+       uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_min_aligned;
 };
 
 #define HNS3_FIXED_MAX_TQP_NUM_MODE            0
@@ -727,6 +749,8 @@ struct hns3_pf {
 
        struct hns3_fdir_info fdir; /* flow director info */
        LIST_HEAD(counters, hns3_flow_counter) flow_counters;
+
+       struct hns3_tm_conf tm_conf;
 };
 
 struct hns3_vf {
@@ -743,8 +767,6 @@ struct hns3_adapter {
                struct hns3_vf vf;
        };
 
-       struct rte_eth_dev *eth_dev;
-
        bool rx_simple_allowed;
        bool rx_vec_allowed;
        bool tx_simple_allowed;
@@ -761,6 +783,7 @@ struct hns3_adapter {
 #define HNS3_DEV_SUPPORT_TX_PUSH_B             0x5
 #define HNS3_DEV_SUPPORT_INDEP_TXRX_B          0x6
 #define HNS3_DEV_SUPPORT_STASH_B               0x7
+#define HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B      0x9
 
 #define hns3_dev_dcb_supported(hw) \
        hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B)
@@ -791,6 +814,9 @@ struct hns3_adapter {
 #define hns3_dev_stash_supported(hw) \
        hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_STASH_B)
 
+#define hns3_dev_rxd_adv_layout_supported(hw) \
+       hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B)
+
 #define HNS3_DEV_PRIVATE_TO_HW(adapter) \
        (&((struct hns3_adapter *)adapter)->hw)
 #define HNS3_DEV_PRIVATE_TO_PF(adapter) \
@@ -798,6 +824,12 @@ struct hns3_adapter {
 #define HNS3_DEV_HW_TO_ADAPTER(hw) \
        container_of(hw, struct hns3_adapter, hw)
 
+static inline struct hns3_pf *HNS3_DEV_HW_TO_PF(struct hns3_hw *hw)
+{
+       struct hns3_adapter *adapter = HNS3_DEV_HW_TO_ADAPTER(hw);
+       return &adapter->pf;
+}
+
 #define hns3_set_field(origin, mask, shift, val) \
        do { \
                (origin) &= (~(mask)); \
@@ -877,7 +909,7 @@ static inline uint32_t hns3_read_reg(void *base, uint32_t reg)
 #define hns3_read_dev(a, reg) \
        hns3_read_reg((a)->io_base, (reg))
 
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+#define ARRAY_SIZE(x) RTE_DIM(x)
 
 #define NEXT_ITEM_OF_ACTION(act, actions, index)                        \
        do {                                                            \
@@ -936,9 +968,13 @@ int hns3_dev_filter_ctrl(struct rte_eth_dev *dev,
                         enum rte_filter_op filter_op, void *arg);
 bool hns3_is_reset_pending(struct hns3_adapter *hns);
 bool hns3vf_is_reset_pending(struct hns3_adapter *hns);
-void hns3_update_link_status(struct hns3_hw *hw);
+void hns3_update_link_status_and_event(struct hns3_hw *hw);
 void hns3_ether_format_addr(char *buf, uint16_t size,
                        const struct rte_ether_addr *ether_addr);
+int hns3_dev_infos_get(struct rte_eth_dev *eth_dev,
+                      struct rte_eth_dev_info *info);
+void hns3vf_update_link_status(struct hns3_hw *hw, uint8_t link_status,
+                         uint32_t link_speed, uint8_t link_duplex);
 
 static inline bool
 is_reset_pending(struct hns3_adapter *hns)