net/ice: enable flow director queue group

[dpdk.git] / drivers / net / hns3 / hns3_ethdev.h

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index aba793b..9710e45 100644 (file)
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -8,6 +8,12 @@
 #include <sys/time.h>
 #include <rte_alarm.h>
 
+#include "hns3_cmd.h"
+#include "hns3_mbx.h"
+#include "hns3_rss.h"
+#include "hns3_fdir.h"
+#include "hns3_stats.h"
+
 /* Vendor ID */
 #define PCI_VENDOR_ID_HUAWEI                   0x19e5
 
@@ -40,7 +46,6 @@
 
 #define HNS3_4_TCS                     4
 #define HNS3_8_TCS                     8
-#define HNS3_MAX_TC_NUM                        8
 
 #define HNS3_MAX_PF_NUM                        8
 #define HNS3_UMV_TBL_SIZE              3072
@@ -268,9 +273,6 @@ struct hns3_reset_stats {
        uint64_t merge_cnt;   /* Total merged in high reset times */
 };
 
-struct hns3_hw;
-struct hns3_adapter;
-
 typedef bool (*check_completion_func)(struct hns3_hw *hw);
 
 struct hns3_wait_data {
@@ -331,8 +333,15 @@ struct hns3_reset_data {
 struct hns3_hw {
        struct rte_eth_dev_data *data;
        void *io_base;
+       struct hns3_cmq cmq;
+       struct hns3_mbx_resp_status mbx_resp; /* mailbox response */
+       struct hns3_mbx_arq_ring arq;         /* mailbox async rx queue */
+       pthread_t irq_thread_id;
        struct hns3_mac mac;
        unsigned int secondary_cnt; /* Number of secondary processes init'd. */
+       struct hns3_tqp_stats tqp_stats;
+       /* Include Mac stats | Rx stats | Tx stats */
+       struct hns3_mac_stats mac_stats;
        uint32_t fw_version;
 
        uint16_t num_msi;
@@ -346,6 +355,9 @@ struct hns3_hw {
        struct rte_ether_addr mc_addrs[HNS3_MC_MACADDR_NUM];
        int mc_addrs_num; /* Multicast mac addresses number */
 
+       /* The configuration info of RSS */
+       struct hns3_rss_conf rss_info;
+
        uint8_t num_tc;             /* Total number of enabled TCs */
        uint8_t hw_tc_map;
        enum hns3_fc_mode current_mode;
@@ -467,6 +479,9 @@ struct hns3_pf {
        struct hns3_vtag_cfg vtag_config;
        struct hns3_port_base_vlan_config port_base_vlan_cfg;
        LIST_HEAD(vlan_tbl, hns3_user_vlan_table) vlan_list;
+
+       struct hns3_fdir_info fdir; /* flow director info */
+       LIST_HEAD(counters, hns3_flow_counter) flow_counters;
 };
 
 struct hns3_vf {
@@ -608,4 +623,23 @@ hns3_test_and_clear_bit(unsigned int nr, volatile uint64_t *addr)
        return __atomic_fetch_and(addr, ~mask, __ATOMIC_RELAXED) & mask;
 }
 
+int hns3_buffer_alloc(struct hns3_hw *hw);
+int hns3_config_gro(struct hns3_hw *hw, bool en);
+int hns3_dev_filter_ctrl(struct rte_eth_dev *dev,
+                        enum rte_filter_type filter_type,
+                        enum rte_filter_op filter_op, void *arg);
+bool hns3_is_reset_pending(struct hns3_adapter *hns);
+bool hns3vf_is_reset_pending(struct hns3_adapter *hns);
+
+static inline bool
+is_reset_pending(struct hns3_adapter *hns)
+{
+       bool ret;
+       if (hns->is_vf)
+               ret = hns3vf_is_reset_pending(hns);
+       else
+               ret = hns3_is_reset_pending(hns);
+       return ret;
+}
+
 #endif /* _HNS3_ETHDEV_H_ */