net/enic: enable flow API for VF representor

[dpdk.git] / drivers / net / hns3 / hns3_ethdev.h

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 9e49e28..fd6a9f9 100644 (file)
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -433,6 +433,7 @@ struct hns3_hw {
        uint16_t tqps_num;          /* num task queue pairs of this function */
        uint16_t intr_tqps_num;     /* num queue pairs mapping interrupt */
        uint16_t rss_size_max;      /* HW defined max RSS task queue */
+       uint16_t rx_buf_len;        /* hold min hardware rx buf len */
        uint16_t num_tx_desc;       /* desc num of per tx queue */
        uint16_t num_rx_desc;       /* desc num of per rx queue */
        uint32_t mng_entry_num;     /* number of manager table entry */
@@ -575,6 +576,23 @@ struct hns3_mp_param {
 /* Key string for IPC. */
 #define HNS3_MP_NAME "net_hns3_mp"
 
+#define HNS3_L2TBL_NUM 4
+#define HNS3_L3TBL_NUM 16
+#define HNS3_L4TBL_NUM 16
+#define HNS3_OL3TBL_NUM        16
+#define HNS3_OL4TBL_NUM        16
+
+struct hns3_ptype_table {
+       uint32_t l2table[HNS3_L2TBL_NUM];
+       uint32_t l3table[HNS3_L3TBL_NUM];
+       uint32_t l4table[HNS3_L4TBL_NUM];
+       uint32_t inner_l2table[HNS3_L2TBL_NUM];
+       uint32_t inner_l3table[HNS3_L3TBL_NUM];
+       uint32_t inner_l4table[HNS3_L4TBL_NUM];
+       uint32_t ol3table[HNS3_OL3TBL_NUM];
+       uint32_t ol4table[HNS3_OL4TBL_NUM];
+};
+
 struct hns3_pf {
        struct hns3_adapter *adapter;
        bool is_main_pf;
@@ -623,6 +641,13 @@ struct hns3_adapter {
                struct hns3_pf pf;
                struct hns3_vf vf;
        };
+
+       bool rx_simple_allowed;
+       bool rx_vec_allowed;
+       bool tx_simple_allowed;
+       bool tx_vec_allowed;
+
+       struct hns3_ptype_table ptype_tbl __rte_cache_min_aligned;
 };
 
 #define HNS3_DEV_SUPPORT_DCB_B                 0x0
@@ -708,14 +733,39 @@ struct hns3_adapter {
 
 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
 
+/*
+ * Because hardware always access register in little-endian mode based on hns3
+ * network engine, so driver should also call rte_cpu_to_le_32 to convert data
+ * in little-endian mode before writing register and call rte_le_to_cpu_32 to
+ * convert data after reading from register.
+ *
+ * Here the driver encapsulates the data conversion operation in the register
+ * read/write operation function as below:
+ *   hns3_write_reg
+ *   hns3_write_reg_opt
+ *   hns3_read_reg
+ * Therefore, when calling these functions, conversion is not required again.
+ */
 static inline void hns3_write_reg(void *base, uint32_t reg, uint32_t value)
 {
-       rte_write32(value, (volatile void *)((char *)base + reg));
+       rte_write32(rte_cpu_to_le_32(value),
+                   (volatile void *)((char *)base + reg));
+}
+
+/*
+ * The optimized function for writing registers used in the '.rx_pkt_burst' and
+ * '.tx_pkt_burst' ops implementation function.
+ */
+static inline void hns3_write_reg_opt(volatile void *addr, uint32_t value)
+{
+       rte_io_wmb();
+       rte_write32_relaxed(rte_cpu_to_le_32(value), addr);
 }
 
 static inline uint32_t hns3_read_reg(void *base, uint32_t reg)
 {
-       return rte_read32((volatile void *)((char *)base + reg));
+       uint32_t read_val = rte_read32((volatile void *)((char *)base + reg));
+       return rte_le_to_cpu_32(read_val);
 }
 
 #define hns3_write_dev(a, reg, value) \