if (ret < 0) {
PMD_INIT_LOG(ERR, "failed to write PCI offset 0x%x",
(pos + PCI_MSIX_FLAGS));
+ return -ENXIO;
}
+
return 0;
}
+
return -ENXIO;
}
.offloads = 0,
};
- info->vmdq_queue_num = 0;
-
info->reta_size = hw->rss_ind_tbl_size;
info->hash_key_size = HNS3_RSS_KEY_SIZE;
info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
+
+ info->default_rxportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
+ info->default_txportconf.burst_size = HNS3_DEFAULT_PORT_CONF_BURST_SIZE;
+ info->default_rxportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
+ info->default_txportconf.nb_queues = HNS3_DEFAULT_PORT_CONF_QUEUES_NUM;
info->default_rxportconf.ring_size = HNS3_DEFAULT_RING_DESC;
info->default_txportconf.ring_size = HNS3_DEFAULT_RING_DESC;
{
struct hns3_hw *hw = &hns->hw;
- if (nb_rx_q < hw->num_tc) {
- hns3_err(hw, "number of Rx queues(%u) is less than tcs(%u).",
- nb_rx_q, hw->num_tc);
- return -EINVAL;
- }
-
- if (nb_tx_q < hw->num_tc) {
- hns3_err(hw, "number of Tx queues(%u) is less than tcs(%u).",
- nb_tx_q, hw->num_tc);
- return -EINVAL;
- }
-
return hns3_queue_to_tc_mapping(hw, nb_rx_q, nb_tx_q);
}
hns3vf_request_link_info(struct hns3_hw *hw)
{
struct hns3_vf *vf = HNS3_DEV_HW_TO_VF(hw);
- uint8_t resp_msg;
bool send_req;
int ret;
return;
ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_LINK_STATUS, 0, NULL, 0, false,
- &resp_msg, sizeof(resp_msg));
+ NULL, 0);
if (ret) {
hns3_err(hw, "failed to fetch link status, ret = %d", ret);
return;
struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
struct hns3_adapter *hns = eth_dev->data->dev_private;
struct hns3_hw *hw = &hns->hw;
- uint8_t respmsg;
int ret;
ret = hns3_send_mbx_msg(hw, HNS3_MBX_KEEP_ALIVE, 0, NULL, 0,
- false, &respmsg, sizeof(uint8_t));
+ false, NULL, 0);
if (ret)
hns3_err(hw, "VF sends keeping alive cmd failed(=%d)",
ret);
goto err_init_hardware;
}
- ret = hns3vf_set_alive(hw, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Failed to VF send alive to PF: %d", ret);
- goto err_init_hardware;
- }
-
return 0;
err_init_hardware:
hns3_rss_set_default_args(hw);
+ ret = hns3vf_set_alive(hw, true);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Failed to VF send alive to PF: %d", ret);
+ goto err_set_tc_queue;
+ }
+
return 0;
err_set_tc_queue:
HNS3_FW_VERSION_BYTE1_S),
hns3_get_field(version, HNS3_FW_VERSION_BYTE0_M,
HNS3_FW_VERSION_BYTE0_S));
+ if (ret < 0)
+ return -EINVAL;
+
ret += 1; /* add the size of '\0' */
- if (fw_size < (uint32_t)ret)
+ if (fw_size < (size_t)ret)
return ret;
else
return 0;
case ETH_SPEED_NUM_50G:
case ETH_SPEED_NUM_100G:
case ETH_SPEED_NUM_200G:
- new_link.link_speed = mac->link_speed;
+ if (mac->link_status)
+ new_link.link_speed = mac->link_speed;
break;
default:
if (mac->link_status)
new_link.link_speed = ETH_SPEED_NUM_UNKNOWN;
- else
- new_link.link_speed = ETH_SPEED_NUM_NONE;
break;
}
+ if (!mac->link_status)
+ new_link.link_speed = ETH_SPEED_NUM_NONE;
+
new_link.link_duplex = mac->link_duplex;
new_link.link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
new_link.link_autoneg =
/* Check the registers to confirm whether there is reset pending */
hns3vf_check_event_cause(hns, NULL);
reset = hns3vf_get_reset_level(hw, &hw->reset.pending);
- if (hw->reset.level != HNS3_NONE_RESET && hw->reset.level < reset) {
+ if (hw->reset.level != HNS3_NONE_RESET && reset != HNS3_NONE_RESET &&
+ hw->reset.level < reset) {
hns3_warn(hw, "High level reset %d is pending", reset);
return true;
}
hns3_warn(hw, "hardware is ready, delay 1 sec for PF reset complete");
return -EAGAIN;
} else if (wait_data->result == HNS3_WAIT_TIMEOUT) {
- gettimeofday(&tv, NULL);
+ hns3_clock_gettime(&tv);
hns3_warn(hw, "Reset step4 hardware not ready after reset time=%ld.%.6ld",
tv.tv_sec, tv.tv_usec);
return -ETIME;
wait_data->hns = hns;
wait_data->check_completion = is_vf_reset_done;
wait_data->end_ms = (uint64_t)HNS3VF_RESET_WAIT_CNT *
- HNS3VF_RESET_WAIT_MS + get_timeofday_ms();
+ HNS3VF_RESET_WAIT_MS + hns3_clock_gettime_ms();
wait_data->interval = HNS3VF_RESET_WAIT_MS * USEC_PER_MSEC;
wait_data->count = HNS3VF_RESET_WAIT_CNT;
wait_data->result = HNS3_WAIT_REQUEST;
hns3_info(hw, "hns3vf dev restart successful!");
} else if (hw->adapter_state == HNS3_NIC_STOPPING)
hw->adapter_state = HNS3_NIC_CONFIGURED;
+
+ ret = hns3vf_set_alive(hw, true);
+ if (ret) {
+ hns3_err(hw, "failed to VF send alive to PF: %d", ret);
+ goto err_vlan_table;
+ }
+
return 0;
err_vlan_table:
*/
reset_level = hns3vf_get_reset_level(hw, &hw->reset.pending);
if (reset_level != HNS3_NONE_RESET) {
- gettimeofday(&tv_start, NULL);
+ hns3_clock_gettime(&tv_start);
hns3_reset_process(hns, reset_level);
- gettimeofday(&tv, NULL);
+ hns3_clock_gettime(&tv);
timersub(&tv, &tv_start, &tv_delta);
- msec = tv_delta.tv_sec * MSEC_PER_SEC +
- tv_delta.tv_usec / USEC_PER_MSEC;
+ msec = hns3_clock_calctime_ms(&tv_delta);
if (msec > HNS3_RESET_PROCESS_MS)
- hns3_err(hw, "%d handle long time delta %" PRIx64
+ hns3_err(hw, "%d handle long time delta %" PRIu64
" ms time=%ld.%.6ld",
hw->reset.level, msec, tv.tv_sec, tv.tv_usec);
}
return -ENOMEM;
}
- /* initialize flow filter lists */
- hns3_filterlist_init(eth_dev);
+ hns3_flow_init(eth_dev);
hns3_set_rxtx_function(eth_dev);
eth_dev->dev_ops = &hns3vf_eth_dev_ops;
RTE_PMD_REGISTER_KMOD_DEP(net_hns3_vf, "* igb_uio | vfio-pci");
RTE_PMD_REGISTER_PARAM_STRING(net_hns3_vf,
HNS3_DEVARG_RX_FUNC_HINT "=vec|sve|simple|common "
- HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common ");
+ HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common "
+ HNS3_DEVARG_DEV_CAPS_MASK "=<1-65535> ");