static int
hns3vf_wait_hardware_ready(struct hns3_adapter *hns)
{
+#define HNS3_WAIT_PF_RESET_READY_TIME 5
struct hns3_hw *hw = &hns->hw;
struct hns3_wait_data *wait_data = hw->reset.wait_data;
struct timeval tv;
return 0;
wait_data->check_completion = NULL;
- wait_data->interval = 1 * MSEC_PER_SEC * USEC_PER_MSEC;
+ wait_data->interval = HNS3_WAIT_PF_RESET_READY_TIME *
+ MSEC_PER_SEC * USEC_PER_MSEC;
wait_data->count = 1;
wait_data->result = HNS3_WAIT_REQUEST;
rte_eal_alarm_set(wait_data->interval, hns3_wait_callback,
wait_data);
- hns3_warn(hw, "hardware is ready, delay 1 sec for PF reset complete");
+ hns3_warn(hw, "hardware is ready, delay %d sec for PF reset complete",
+ HNS3_WAIT_PF_RESET_READY_TIME);
return -EAGAIN;
} else if (wait_data->result == HNS3_WAIT_TIMEOUT) {
hns3_clock_gettime(&tv);
.get_reg = hns3_get_regs,
.dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
.tx_done_cleanup = hns3_tx_done_cleanup,
+ .eth_dev_priv_dump = hns3_eth_dev_priv_dump,
};
static const struct hns3_reset_ops hns3vf_reset_ops = {
PMD_INIT_FUNC_TRACE();
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- __atomic_fetch_sub(&hw->secondary_cnt, 1, __ATOMIC_RELAXED);
hns3_mp_uninit(eth_dev);
return 0;
}