common/cnxk: convert warning to debug print

[dpdk.git] / drivers / net / hns3 / hns3_intr.c

diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index ba6a044..3ca2e1e 100644 (file)
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -8,7 +8,7 @@
 #include <rte_io.h>
 #include <rte_malloc.h>
 
-#include "hns3_ethdev.h"
+#include "hns3_common.h"
 #include "hns3_logs.h"
 #include "hns3_intr.h"
 #include "hns3_regs.h"
@@ -1782,16 +1782,12 @@ enable_tm_err_intr(struct hns3_adapter *hns, bool en)
        }
 
        /* configure TM QCN hw errors */
-       hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_QCN_MEM_INT_CFG, true);
-       ret = hns3_cmd_send(hw, &desc, 1);
-       if (ret) {
-               hns3_err(hw, "fail to read TM QCN CFG status, ret = %d\n", ret);
-               return ret;
-       }
-
-       hns3_cmd_reuse_desc(&desc, false);
-       if (en)
+       hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_QCN_MEM_INT_CFG, false);
+       desc.data[0] = rte_cpu_to_le_32(HNS3_TM_QCN_ERR_INT_TYPE);
+       if (en) {
+               desc.data[0] |= rte_cpu_to_le_32(HNS3_TM_QCN_FIFO_INT_EN);
                desc.data[1] = rte_cpu_to_le_32(HNS3_TM_QCN_MEM_ERR_INT_EN);
+       }
 
        ret = hns3_cmd_send(hw, &desc, 1);
        if (ret)
@@ -2206,8 +2202,8 @@ hns3_handle_type_reg_error_data(struct hns3_hw *hw,
        type_id = err_info->type_id & HNS3_ERR_TYPE_MASK;
        is_ras = err_info->type_id >> HNS3_ERR_TYPE_IS_RAS_OFFSET;
 
-       total_module = ARRAY_SIZE(hns3_hw_module_name);
-       total_type = ARRAY_SIZE(hns3_hw_error_type);
+       total_module = RTE_DIM(hns3_hw_module_name);
+       total_type = RTE_DIM(hns3_hw_error_type);
 
        hns3_err(hw, "total_module:%u, total_type:%u",
                 total_module, total_type);
@@ -2372,7 +2368,7 @@ hns3_handle_error(struct hns3_adapter *hns)
 {
        struct hns3_hw *hw = &hns->hw;
 
-       if (hns3_dev_ras_imp_supported(hw)) {
+       if (hns3_dev_get_support(hw, RAS_IMP)) {
                hns3_handle_hw_error_v2(hw);
                hns3_schedule_reset(hns);
        } else {
@@ -2577,7 +2573,7 @@ hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
        if (merge_cnt != hw->reset.stats.merge_cnt)
                hns3_warn(hw,
                          "No need to do low-level reset after %s reset. "
-                         "merge cnt: %" PRIx64 " total merge cnt: %" PRIx64,
+                         "merge cnt: %" PRIu64 " total merge cnt: %" PRIu64,
                          reset_string[hw->reset.level],
                          hw->reset.stats.merge_cnt - merge_cnt,
                          hw->reset.stats.merge_cnt);
@@ -2586,7 +2582,7 @@ hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
 static bool
 hns3_reset_err_handle(struct hns3_adapter *hns)
 {
-#define MAX_RESET_FAIL_CNT 5
+#define MAX_RESET_FAIL_CNT 30
 
        struct hns3_hw *hw = &hns->hw;
 
@@ -2597,7 +2593,7 @@ hns3_reset_err_handle(struct hns3_adapter *hns)
                hw->reset.attempts = 0;
                hw->reset.stats.fail_cnt++;
                hns3_warn(hw, "%s reset fail because new Reset is pending "
-                             "attempts:%" PRIx64,
+                             "attempts:%" PRIu64,
                          reset_string[hw->reset.level],
                          hw->reset.stats.fail_cnt);
                hw->reset.level = HNS3_NONE_RESET;
@@ -2624,10 +2620,10 @@ hns3_reset_err_handle(struct hns3_adapter *hns)
 reset_fail:
        hw->reset.attempts = 0;
        hw->reset.stats.fail_cnt++;
-       hns3_warn(hw, "%s reset fail fail_cnt:%" PRIx64 " success_cnt:%" PRIx64
-                 " global_cnt:%" PRIx64 " imp_cnt:%" PRIx64
-                 " request_cnt:%" PRIx64 " exec_cnt:%" PRIx64
-                 " merge_cnt:%" PRIx64 "adapter_state:%d",
+       hns3_warn(hw, "%s reset fail fail_cnt:%" PRIu64 " success_cnt:%" PRIu64
+                 " global_cnt:%" PRIu64 " imp_cnt:%" PRIu64
+                 " request_cnt:%" PRIu64 " exec_cnt:%" PRIu64
+                 " merge_cnt:%" PRIu64 "adapter_state:%d",
                  reset_string[hw->reset.level], hw->reset.stats.fail_cnt,
                  hw->reset.stats.success_cnt, hw->reset.stats.global_cnt,
                  hw->reset.stats.imp_cnt, hw->reset.stats.request_cnt,
@@ -2680,7 +2676,7 @@ hns3_reset_pre(struct hns3_adapter *hns)
 static int
 hns3_reset_post(struct hns3_adapter *hns)
 {
-#define TIMEOUT_RETRIES_CNT    5
+#define TIMEOUT_RETRIES_CNT    30
        struct hns3_hw *hw = &hns->hw;
        struct timeval tv_delta;
        struct timeval tv;
@@ -2743,10 +2739,10 @@ hns3_reset_post(struct hns3_adapter *hns)
                rte_spinlock_unlock(&hw->lock);
                hns3_clock_gettime(&tv);
                timersub(&tv, &hw->reset.start_time, &tv_delta);
-               hns3_warn(hw, "%s reset done fail_cnt:%" PRIx64
-                         " success_cnt:%" PRIx64 " global_cnt:%" PRIx64
-                         " imp_cnt:%" PRIx64 " request_cnt:%" PRIx64
-                         " exec_cnt:%" PRIx64 " merge_cnt:%" PRIx64,
+               hns3_warn(hw, "%s reset done fail_cnt:%" PRIu64
+                         " success_cnt:%" PRIu64 " global_cnt:%" PRIu64
+                         " imp_cnt:%" PRIu64 " request_cnt:%" PRIu64
+                         " exec_cnt:%" PRIu64 " merge_cnt:%" PRIu64,
                          reset_string[hw->reset.level],
                          hw->reset.stats.fail_cnt, hw->reset.stats.success_cnt,
                          hw->reset.stats.global_cnt, hw->reset.stats.imp_cnt,
@@ -2774,6 +2770,37 @@ err:
        return -EIO;
 }
 
+static void
+hns3_reset_fail_handle(struct hns3_adapter *hns)
+{
+       struct hns3_hw *hw = &hns->hw;
+       struct timeval tv_delta;
+       struct timeval tv;
+
+       hns3_clear_reset_level(hw, &hw->reset.pending);
+       if (hns3_reset_err_handle(hns)) {
+               hw->reset.stage = RESET_STAGE_PREWAIT;
+               hns3_schedule_reset(hns);
+               return;
+       }
+
+       rte_spinlock_lock(&hw->lock);
+       if (hw->reset.mbuf_deferred_free) {
+               hns3_dev_release_mbufs(hns);
+               hw->reset.mbuf_deferred_free = false;
+       }
+       rte_spinlock_unlock(&hw->lock);
+       __atomic_store_n(&hns->hw.reset.resetting, 0, __ATOMIC_RELAXED);
+       hw->reset.stage = RESET_STAGE_NONE;
+       hns3_clock_gettime(&tv);
+       timersub(&tv, &hw->reset.start_time, &tv_delta);
+       hns3_warn(hw, "%s reset fail delta %" PRIu64 " ms time=%ld.%.6ld",
+                 reset_string[hw->reset.level],
+                 hns3_clock_calctime_ms(&tv_delta),
+                 tv.tv_sec, tv.tv_usec);
+       hw->reset.level = HNS3_NONE_RESET;
+}
+
 /*
  * There are three scenarios as follows:
  * When the reset is not in progress, the reset process starts.
@@ -2788,7 +2815,6 @@ int
 hns3_reset_process(struct hns3_adapter *hns, enum hns3_reset_level new_level)
 {
        struct hns3_hw *hw = &hns->hw;
-       struct timeval tv_delta;
        struct timeval tv;
        int ret;
 
@@ -2847,27 +2873,7 @@ retry:
        if (ret == -EAGAIN)
                return ret;
 err:
-       hns3_clear_reset_level(hw, &hw->reset.pending);
-       if (hns3_reset_err_handle(hns)) {
-               hw->reset.stage = RESET_STAGE_PREWAIT;
-               hns3_schedule_reset(hns);
-       } else {
-               rte_spinlock_lock(&hw->lock);
-               if (hw->reset.mbuf_deferred_free) {
-                       hns3_dev_release_mbufs(hns);
-                       hw->reset.mbuf_deferred_free = false;
-               }
-               rte_spinlock_unlock(&hw->lock);
-               __atomic_store_n(&hns->hw.reset.resetting, 0, __ATOMIC_RELAXED);
-               hw->reset.stage = RESET_STAGE_NONE;
-               hns3_clock_gettime(&tv);
-               timersub(&tv, &hw->reset.start_time, &tv_delta);
-               hns3_warn(hw, "%s reset fail delta %" PRIu64 " ms time=%ld.%.6ld",
-                         reset_string[hw->reset.level],
-                         hns3_clock_calctime_ms(&tv_delta),
-                         tv.tv_sec, tv.tv_usec);
-               hw->reset.level = HNS3_NONE_RESET;
-       }
+       hns3_reset_fail_handle(hns);
 
        return -EIO;
 }