rxq->rx_ring = (struct hns3_desc *)rx_mz->addr;
rxq->rx_ring_phys_addr = rx_mz->iova;
- hns3_dbg(hw, "No.%u rx descriptors iova 0x%" PRIx64, q_info->idx,
- rxq->rx_ring_phys_addr);
-
return rxq;
}
txq->tx_ring = (struct hns3_desc *)tx_mz->addr;
txq->tx_ring_phys_addr = tx_mz->iova;
- hns3_dbg(hw, "No.%u tx descriptors iova 0x%" PRIx64, q_info->idx,
- txq->tx_ring_phys_addr);
-
/* Clear tx bd */
desc = txq->tx_ring;
for (i = 0; i < txq->nb_tx_desc; i++) {
return rte_mbuf_raw_alloc(rxq->mb_pool);
}
-static inline void
+static void
hns3_rx_ptp_timestamp_handle(struct hns3_rx_queue *rxq, struct rte_mbuf *mbuf,
- volatile struct hns3_desc *rxd)
+ uint64_t timestamp)
{
struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(rxq->hns);
- uint64_t timestamp = rte_le_to_cpu_64(rxd->timestamp);
- mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP | RTE_MBUF_F_RX_IEEE1588_TMST;
+ mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP |
+ RTE_MBUF_F_RX_IEEE1588_TMST;
if (hns3_timestamp_rx_dynflag > 0) {
*RTE_MBUF_DYNFIELD(mbuf, hns3_timestamp_dynfield_offset,
rte_mbuf_timestamp_t *) = timestamp;
rxe->mbuf = nmb;
if (unlikely(bd_base_info & BIT(HNS3_RXD_TS_VLD_B)))
- hns3_rx_ptp_timestamp_handle(rxq, rxm, rxdp);
+ hns3_rx_ptp_timestamp_handle(rxq, rxm,
+ rte_le_to_cpu_64(rxdp->timestamp));
dma_addr = rte_mbuf_data_iova_default(nmb);
rxdp->addr = rte_cpu_to_le_64(dma_addr);
struct rte_mbuf *rxm;
struct rte_eth_dev *dev;
uint32_t bd_base_info;
+ uint64_t timestamp;
uint32_t l234_info;
uint32_t gro_size;
uint32_t ol_info;
rxm = rxe->mbuf;
rxe->mbuf = nmb;
+ if (unlikely(bd_base_info & BIT(HNS3_RXD_TS_VLD_B)))
+ timestamp = rte_le_to_cpu_64(rxdp->timestamp);
+
dma_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));
rxdp->rx.bd_base_info = 0;
rxdp->addr = dma_addr;
}
if (unlikely(bd_base_info & BIT(HNS3_RXD_TS_VLD_B)))
- hns3_rx_ptp_timestamp_handle(rxq, first_seg, rxdp);
+ hns3_rx_ptp_timestamp_handle(rxq, first_seg, timestamp);
/*
* The last buffer of the received packet. packet len from
hns3_tx_setup_4bd(struct hns3_desc *txdp, struct rte_mbuf **pkts)
{
#define PER_LOOP_NUM 4
- const uint16_t bd_flag = BIT(HNS3_TXD_VLD_B) | BIT(HNS3_TXD_FE_B);
+ uint16_t bd_flag = BIT(HNS3_TXD_VLD_B) | BIT(HNS3_TXD_FE_B);
uint64_t dma_addr;
uint32_t i;
txdp->tx.paylen_fd_dop_ol4cs = 0;
txdp->tx.type_cs_vlan_tso_len = 0;
txdp->tx.ol_type_vlan_len_msec = 0;
+ if (unlikely((*pkts)->ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST))
+ bd_flag |= BIT(HNS3_TXD_TSYN_B);
txdp->tx.tp_fe_sc_vld_ra_ri = rte_cpu_to_le_16(bd_flag);
}
}
static inline void
hns3_tx_setup_1bd(struct hns3_desc *txdp, struct rte_mbuf **pkts)
{
- const uint16_t bd_flag = BIT(HNS3_TXD_VLD_B) | BIT(HNS3_TXD_FE_B);
+ uint16_t bd_flag = BIT(HNS3_TXD_VLD_B) | BIT(HNS3_TXD_FE_B);
uint64_t dma_addr;
dma_addr = rte_mbuf_data_iova(*pkts);
txdp->tx.paylen_fd_dop_ol4cs = 0;
txdp->tx.type_cs_vlan_tso_len = 0;
txdp->tx.ol_type_vlan_len_msec = 0;
+ if (unlikely((*pkts)->ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST))
+ bd_flag |= BIT(HNS3_TXD_TSYN_B);
txdp->tx.tp_fe_sc_vld_ra_ri = rte_cpu_to_le_16(bd_flag);
}
{
uint64_t offloads = dev->data->dev_conf.txmode.offloads;
- struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- if (hns3_dev_get_support(hw, PTP))
- return false;
-
return (offloads == (offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE));
}
rx_mode.info, tx_mode.info);
}
-void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
+static void
+hns3_eth_dev_fp_ops_config(const struct rte_eth_dev *dev)
+{
+ struct rte_eth_fp_ops *fpo = rte_eth_fp_ops;
+ uint16_t port_id = dev->data->port_id;
+
+ fpo[port_id].rx_pkt_burst = dev->rx_pkt_burst;
+ fpo[port_id].tx_pkt_burst = dev->tx_pkt_burst;
+ fpo[port_id].tx_pkt_prepare = dev->tx_pkt_prepare;
+ fpo[port_id].rx_descriptor_status = dev->rx_descriptor_status;
+ fpo[port_id].tx_descriptor_status = dev->tx_descriptor_status;
+}
+
+void
+hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
{
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
struct hns3_adapter *hns = eth_dev->data->dev_private;
eth_dev->tx_pkt_burst = hns3_dummy_rxtx_burst;
eth_dev->tx_pkt_prepare = NULL;
}
+
+ hns3_eth_dev_fp_ops_config(eth_dev);
}
void
{
dev->tx_pkt_burst = hns3_dummy_rxtx_burst;
dev->tx_pkt_prepare = NULL;
+ hns3_eth_dev_fp_ops_config(dev);
+
+ if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+ return;
+
rte_wmb();
/* Disable tx datapath on secondary process. */
hns3_mp_req_stop_tx(dev);
dev->tx_pkt_burst = hns3_get_tx_function(dev, &prep);
dev->tx_pkt_prepare = prep;
+ hns3_eth_dev_fp_ops_config(dev);
+
+ if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+ return;
+
hns3_mp_req_start_tx(dev);
}