#ifndef _HNS3_RXTX_H_
#define _HNS3_RXTX_H_
+#include <stdint.h>
+#include <rte_mbuf_core.h>
+
#define HNS3_MIN_RING_DESC 64
#define HNS3_MAX_RING_DESC 32768
#define HNS3_DEFAULT_RING_DESC 1024
#define HNS3_RXD_OL3ID_M (0xf << HNS3_RXD_OL3ID_S)
#define HNS3_RXD_OL4ID_S 8
#define HNS3_RXD_OL4ID_M (0xf << HNS3_RXD_OL4ID_S)
+#define HNS3_RXD_PTYPE_S 4
+#define HNS3_RXD_PTYPE_M (0xff << HNS3_RXD_PTYPE_S)
#define HNS3_RXD_FBHI_S 12
#define HNS3_RXD_FBHI_M (0x3 << HNS3_RXD_FBHI_S)
#define HNS3_RXD_FBLI_S 14
#define HNS3_TXD_MSS_S 0
#define HNS3_TXD_MSS_M (0x3fff << HNS3_TXD_MSS_S)
+#define HNS3_TXD_OL4CS_B 22
#define HNS3_L2_LEN_UNIT 1UL
#define HNS3_L3_LEN_UNIT 2UL
#define HNS3_L4_LEN_UNIT 2UL
};
};
- uint32_t paylen;
+ uint32_t paylen_fd_dop_ol4cs;
uint16_t tp_fe_sc_vld_ra_ri;
uint16_t mss;
} tx;
struct rte_mbuf *mbuf;
};
+struct hns3_rx_basic_stats {
+ uint64_t packets;
+ uint64_t bytes;
+ uint64_t errors;
+};
+
+struct hns3_rx_dfx_stats {
+ uint64_t l3_csum_errors;
+ uint64_t l4_csum_errors;
+ uint64_t ol3_csum_errors;
+ uint64_t ol4_csum_errors;
+};
+
+struct hns3_rx_bd_errors_stats {
+ uint64_t l2_errors;
+ uint64_t pkt_len_errors;
+};
+
struct hns3_rx_queue {
void *io_base;
volatile void *io_head_reg;
* point, the pvid_sw_discard_en will be false.
*/
bool pvid_sw_discard_en;
+ bool ptype_en; /* indicate if the ptype field enabled */
+ bool enabled; /* indicate if Rx queue has been enabled */
- uint64_t l2_errors;
- uint64_t pkt_len_errors;
- uint64_t l3_csum_errors;
- uint64_t l4_csum_errors;
- uint64_t ol3_csum_errors;
- uint64_t ol4_csum_errors;
+ struct hns3_rx_basic_stats basic_stats;
+ /* DFX statistics that driver does not need to discard packets */
+ struct hns3_rx_dfx_stats dfx_stats;
+ /* Error statistics that driver needs to discard packets */
+ struct hns3_rx_bd_errors_stats err_stats;
struct rte_mbuf *bulk_mbuf[HNS3_BULK_ALLOC_MBUF_NUM];
uint16_t bulk_mbuf_num;
struct rte_mbuf fake_mbuf; /* fake mbuf used with vector rx */
};
+struct hns3_tx_basic_stats {
+ uint64_t packets;
+ uint64_t bytes;
+};
+
+/*
+ * The following items are used for the abnormal errors statistics in
+ * the Tx datapath. When upper level application calls the
+ * rte_eth_tx_burst API function to send multiple packets at a time with
+ * burst mode based on hns3 network engine, there are some abnormal
+ * conditions that cause the driver to fail to operate the hardware to
+ * send packets correctly.
+ * Note: When using burst mode to call the rte_eth_tx_burst API function
+ * to send multiple packets at a time. When the first abnormal error is
+ * detected, add one to the relevant error statistics item, and then
+ * exit the loop of sending multiple packets of the function. That is to
+ * say, even if there are multiple packets in which abnormal errors may
+ * be detected in the burst, the relevant error statistics in the driver
+ * will only be increased by one.
+ * The detail description of the Tx abnormal errors statistic items as
+ * below:
+ * - over_length_pkt_cnt
+ * Total number of greater than HNS3_MAX_FRAME_LEN the driver
+ * supported.
+ *
+ * - exceed_limit_bd_pkt_cnt
+ * Total number of exceeding the hardware limited bd which process
+ * a packet needed bd numbers.
+ *
+ * - exceed_limit_bd_reassem_fail
+ * Total number of exceeding the hardware limited bd fail which
+ * process a packet needed bd numbers and reassemble fail.
+ *
+ * - unsupported_tunnel_pkt_cnt
+ * Total number of unsupported tunnel packet. The unsupported tunnel
+ * type: vxlan_gpe, gtp, ipip and MPLSINUDP, MPLSINUDP is a packet
+ * with MPLS-in-UDP RFC 7510 header.
+ *
+ * - queue_full_cnt
+ * Total count which the available bd numbers in current bd queue is
+ * less than the bd numbers with the pkt process needed.
+ *
+ * - pkt_padding_fail_cnt
+ * Total count which the packet length is less than minimum packet
+ * length(struct hns3_tx_queue::min_tx_pkt_len) supported by
+ * hardware in Tx direction and fail to be appended with 0.
+ */
+struct hns3_tx_dfx_stats {
+ uint64_t over_length_pkt_cnt;
+ uint64_t exceed_limit_bd_pkt_cnt;
+ uint64_t exceed_limit_bd_reassem_fail;
+ uint64_t unsupported_tunnel_pkt_cnt;
+ uint64_t queue_full_cnt;
+ uint64_t pkt_padding_fail_cnt;
+};
+
struct hns3_tx_queue {
void *io_base;
volatile void *io_tail_reg;
uint16_t tx_rs_thresh;
struct rte_mbuf **free;
+ /*
+ * tso mode.
+ * value range:
+ * HNS3_TSO_SW_CAL_PSEUDO_H_CSUM/HNS3_TSO_HW_CAL_PSEUDO_H_CSUM
+ *
+ * - HNS3_TSO_SW_CAL_PSEUDO_H_CSUM
+ * In this mode, because of the hardware constraint, network driver
+ * software need erase the L4 len value of the TCP pseudo header
+ * and recalculate the TCP pseudo header checksum of packets that
+ * need TSO.
+ *
+ * - HNS3_TSO_HW_CAL_PSEUDO_H_CSUM
+ * In this mode, hardware support recalculate the TCP pseudo header
+ * checksum of packets that need TSO, so network driver software
+ * not need to recalculate it.
+ */
+ uint8_t tso_mode;
+ /*
+ * udp checksum mode.
+ * value range:
+ * HNS3_SPECIAL_PORT_HW_CKSUM_MODE/HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+ *
+ * - HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+ * In this mode, HW can not do checksum for special UDP port like
+ * 4789, 4790, 6081 for non-tunnel UDP packets and UDP tunnel
+ * packets without the PKT_TX_TUNEL_MASK in the mbuf. So, PMD need
+ * do the checksum for these packets to avoid a checksum error.
+ *
+ * - HNS3_SPECIAL_PORT_HW_CKSUM_MODE
+ * In this mode, HW does not have the preceding problems and can
+ * directly calculate the checksum of these UDP packets.
+ */
+ uint8_t udp_cksum_mode;
/*
* The minimum length of the packet supported by hardware in the Tx
* direction.
*/
uint32_t min_tx_pkt_len;
+ uint8_t max_non_tso_bd_num; /* max BD number of one non-TSO packet */
bool tx_deferred_start; /* don't start this queue in dev start */
bool configured; /* indicate if tx queue has been configured */
/*
* this point.
*/
bool pvid_sw_shift_en;
+ bool enabled; /* indicate if Tx queue has been enabled */
- /*
- * The following items are used for the abnormal errors statistics in
- * the Tx datapath. When upper level application calls the
- * rte_eth_tx_burst API function to send multiple packets at a time with
- * burst mode based on hns3 network engine, there are some abnormal
- * conditions that cause the driver to fail to operate the hardware to
- * send packets correctly.
- * Note: When using burst mode to call the rte_eth_tx_burst API function
- * to send multiple packets at a time. When the first abnormal error is
- * detected, add one to the relevant error statistics item, and then
- * exit the loop of sending multiple packets of the function. That is to
- * say, even if there are multiple packets in which abnormal errors may
- * be detected in the burst, the relevant error statistics in the driver
- * will only be increased by one.
- * The detail description of the Tx abnormal errors statistic items as
- * below:
- * - over_length_pkt_cnt
- * Total number of greater than HNS3_MAX_FRAME_LEN the driver
- * supported.
- *
- * - exceed_limit_bd_pkt_cnt
- * Total number of exceeding the hardware limited bd which process
- * a packet needed bd numbers.
- *
- * - exceed_limit_bd_reassem_fail
- * Total number of exceeding the hardware limited bd fail which
- * process a packet needed bd numbers and reassemble fail.
- *
- * - unsupported_tunnel_pkt_cnt
- * Total number of unsupported tunnel packet. The unsupported tunnel
- * type: vxlan_gpe, gtp, ipip and MPLSINUDP, MPLSINUDP is a packet
- * with MPLS-in-UDP RFC 7510 header.
- *
- * - queue_full_cnt
- * Total count which the available bd numbers in current bd queue is
- * less than the bd numbers with the pkt process needed.
- *
- * - pkt_padding_fail_cnt
- * Total count which the packet length is less than minimum packet
- * length(struct hns3_tx_queue::min_tx_pkt_len) supported by
- * hardware in Tx direction and fail to be appended with 0.
- */
- uint64_t over_length_pkt_cnt;
- uint64_t exceed_limit_bd_pkt_cnt;
- uint64_t exceed_limit_bd_reassem_fail;
- uint64_t unsupported_tunnel_pkt_cnt;
- uint64_t queue_full_cnt;
- uint64_t pkt_padding_fail_cnt;
+ struct hns3_tx_basic_stats basic_stats;
+ struct hns3_tx_dfx_stats dfx_stats;
};
#define HNS3_GET_TX_QUEUE_PEND_BD_NUM(txq) \
};
#define HNS3_TX_CKSUM_OFFLOAD_MASK ( \
- PKT_TX_OUTER_IPV6 | \
- PKT_TX_OUTER_IPV4 | \
+ PKT_TX_OUTER_UDP_CKSUM | \
PKT_TX_OUTER_IP_CKSUM | \
- PKT_TX_IPV6 | \
- PKT_TX_IPV4 | \
PKT_TX_IP_CKSUM | \
- PKT_TX_L4_MASK | \
- PKT_TX_TUNNEL_MASK)
+ PKT_TX_TCP_SEG | \
+ PKT_TX_L4_MASK)
enum hns3_cksum_status {
HNS3_CKSUM_NONE = 0,
if (unlikely((l234_info & L2E_TRUNC_ERR_FLAG) || rxm->pkt_len == 0)) {
if (l234_info & BIT(HNS3_RXD_L2E_B))
- rxq->l2_errors++;
+ rxq->err_stats.l2_errors++;
else
- rxq->pkt_len_errors++;
+ rxq->err_stats.pkt_len_errors++;
return -EINVAL;
}
if (unlikely(l234_info & BIT(HNS3_RXD_L3E_B))) {
rxm->ol_flags |= PKT_RX_IP_CKSUM_BAD;
- rxq->l3_csum_errors++;
+ rxq->dfx_stats.l3_csum_errors++;
tmp |= HNS3_L3_CKSUM_ERR;
}
if (unlikely(l234_info & BIT(HNS3_RXD_L4E_B))) {
rxm->ol_flags |= PKT_RX_L4_CKSUM_BAD;
- rxq->l4_csum_errors++;
+ rxq->dfx_stats.l4_csum_errors++;
tmp |= HNS3_L4_CKSUM_ERR;
}
if (unlikely(l234_info & BIT(HNS3_RXD_OL3E_B))) {
- rxq->ol3_csum_errors++;
+ rxq->dfx_stats.ol3_csum_errors++;
tmp |= HNS3_OUTER_L3_CKSUM_ERR;
}
if (unlikely(l234_info & BIT(HNS3_RXD_OL4E_B))) {
rxm->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
- rxq->ol4_csum_errors++;
+ rxq->dfx_stats.ol4_csum_errors++;
tmp |= HNS3_OUTER_L4_CKSUM_ERR;
}
}
hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info,
const uint32_t ol_info)
{
- const struct hns3_ptype_table *const ptype_tbl = rxq->ptype_tbl;
+ const struct hns3_ptype_table * const ptype_tbl = rxq->ptype_tbl;
uint32_t l2id, l3id, l4id;
- uint32_t ol3id, ol4id;
+ uint32_t ol3id, ol4id, ol2id;
+ uint32_t ptype;
+
+ if (rxq->ptype_en) {
+ ptype = hns3_get_field(ol_info, HNS3_RXD_PTYPE_M,
+ HNS3_RXD_PTYPE_S);
+ return ptype_tbl->ptype[ptype];
+ }
ol4id = hns3_get_field(ol_info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
ol3id = hns3_get_field(ol_info, HNS3_RXD_OL3ID_M, HNS3_RXD_OL3ID_S);
- l2id = hns3_get_field(l234_info, HNS3_RXD_STRP_TAGP_M,
- HNS3_RXD_STRP_TAGP_S);
+ ol2id = hns3_get_field(ol_info, HNS3_RXD_OVLAN_M, HNS3_RXD_OVLAN_S);
+ l2id = hns3_get_field(l234_info, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S);
l3id = hns3_get_field(l234_info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
l4id = hns3_get_field(l234_info, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S);
return ptype_tbl->inner_l2table[l2id] |
ptype_tbl->inner_l3table[l3id] |
ptype_tbl->inner_l4table[l4id] |
- ptype_tbl->ol3table[ol3id] | ptype_tbl->ol4table[ol4id];
+ ptype_tbl->ol3table[ol3id] |
+ ptype_tbl->ol4table[ol4id] | ptype_tbl->ol2table[ol2id];
else
- return ptype_tbl->l2table[l2id] | ptype_tbl->l3table[l3id] |
+ return ptype_tbl->l2l3table[l2id][l3id] |
ptype_tbl->l4table[l4id];
}
void hns3_dev_rx_queue_release(void *queue);
void hns3_dev_tx_queue_release(void *queue);
void hns3_free_all_queues(struct rte_eth_dev *dev);
-int hns3_reset_all_queues(struct hns3_adapter *hns);
+int hns3_reset_all_tqps(struct hns3_adapter *hns);
void hns3_dev_all_rx_queue_intr_enable(struct hns3_hw *hw, bool en);
int hns3_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
int hns3_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
void hns3_enable_all_queues(struct hns3_hw *hw, bool en);
-int hns3_start_queues(struct hns3_adapter *hns, bool reset_queue);
-int hns3_stop_queues(struct hns3_adapter *hns, bool reset_queue);
+int hns3_init_queues(struct hns3_adapter *hns, bool reset_queue);
+void hns3_start_tqps(struct hns3_hw *hw);
+void hns3_stop_tqps(struct hns3_hw *hw);
int hns3_rxq_iterate(struct rte_eth_dev *dev,
int (*callback)(struct hns3_rx_queue *, void *), void *arg);
void hns3_dev_release_mbufs(struct hns3_adapter *hns);
struct rte_mempool *mp);
int hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,
unsigned int socket, const struct rte_eth_txconf *conf);
+uint32_t hns3_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int hns3_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
+int hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
uint16_t hns3_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
uint16_t hns3_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
uint16_t hns3_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
+uint16_t hns3_recv_pkts_vec_sve(void *rx_queue, struct rte_mbuf **rx_pkts,
+ uint16_t nb_pkts);
int hns3_rx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode);
uint16_t nb_pkts);
uint16_t hns3_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
+uint16_t hns3_xmit_pkts_vec_sve(void *tx_queue, struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
int hns3_tx_burst_mode_get(struct rte_eth_dev *dev,
__rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode);
const uint32_t *hns3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
void hns3_init_rx_ptype_tble(struct rte_eth_dev *dev);
void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev);
+uint32_t hns3_get_tqp_intr_reg_offset(uint16_t tqp_intr_id);
void hns3_set_queue_intr_gl(struct hns3_hw *hw, uint16_t queue_id,
uint8_t gl_idx, uint16_t gl_value);
void hns3_set_queue_intr_rl(struct hns3_hw *hw, uint16_t queue_id,
struct rte_eth_rxq_info *qinfo);
void hns3_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
+uint32_t hns3_get_tqp_reg_offset(uint16_t idx);
+int hns3_start_all_txqs(struct rte_eth_dev *dev);
+int hns3_start_all_rxqs(struct rte_eth_dev *dev);
+void hns3_stop_all_txqs(struct rte_eth_dev *dev);
+void hns3_restore_tqp_enable_state(struct hns3_hw *hw);
+int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
+void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
+int hns3_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
+
#endif /* _HNS3_RXTX_H_ */