net/mlx5: fix flow age event triggering
[dpdk.git] / drivers / net / hns3 / hns3_rxtx.h
index 331b507..703c4b7 100644 (file)
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
  */
 
 #ifndef _HNS3_RXTX_H_
@@ -88,6 +88,8 @@
 #define HNS3_RXD_OL3ID_M                       (0xf << HNS3_RXD_OL3ID_S)
 #define HNS3_RXD_OL4ID_S                       8
 #define HNS3_RXD_OL4ID_M                       (0xf << HNS3_RXD_OL4ID_S)
+#define HNS3_RXD_PTYPE_S                       4
+#define HNS3_RXD_PTYPE_M                       (0xff << HNS3_RXD_PTYPE_S)
 #define HNS3_RXD_FBHI_S                                12
 #define HNS3_RXD_FBHI_M                                (0x3 << HNS3_RXD_FBHI_S)
 #define HNS3_RXD_FBLI_S                                14
 #define HNS3_RXD_LUM_B                         9
 #define HNS3_RXD_CRCP_B                                10
 #define HNS3_RXD_L3L4P_B                       11
-#define HNS3_RXD_TSIND_S                       12
-#define HNS3_RXD_TSIND_M                       (0x7 << HNS3_RXD_TSIND_S)
-#define HNS3_RXD_LKBK_B                                15
+
+#define HNS3_RXD_TS_VLD_B                      14
 #define HNS3_RXD_GRO_SIZE_S                    16
 #define HNS3_RXD_GRO_SIZE_M                    (0x3fff << HNS3_RXD_GRO_SIZE_S)
 
 #define HNS3_TXD_MSS_S                         0
 #define HNS3_TXD_MSS_M                         (0x3fff << HNS3_TXD_MSS_S)
 
+#define HNS3_TXD_OL4CS_B                       22
 #define HNS3_L2_LEN_UNIT                       1UL
 #define HNS3_L3_LEN_UNIT                       2UL
 #define HNS3_L4_LEN_UNIT                       2UL
@@ -197,6 +199,8 @@ enum hns3_pkt_tun_type {
 struct hns3_desc {
        union {
                uint64_t addr;
+               uint64_t timestamp;
+
                struct {
                        uint32_t addr0;
                        uint32_t addr1;
@@ -232,7 +236,7 @@ struct hns3_desc {
                                };
                        };
 
-                       uint32_t paylen;
+                       uint32_t paylen_fd_dop_ol4cs;
                        uint16_t tp_fe_sc_vld_ra_ri;
                        uint16_t mss;
                } tx;
@@ -328,6 +332,7 @@ struct hns3_rx_queue {
         * point, the pvid_sw_discard_en will be false.
         */
        bool pvid_sw_discard_en;
+       bool ptype_en;          /* indicate if the ptype field enabled */
        bool enabled;           /* indicate if Rx queue has been enabled */
 
        struct hns3_rx_basic_stats basic_stats;
@@ -460,6 +465,22 @@ struct hns3_tx_queue {
         *     not need to recalculate it.
         */
        uint8_t tso_mode;
+       /*
+        * udp checksum mode.
+        * value range:
+        *      HNS3_SPECIAL_PORT_HW_CKSUM_MODE/HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+        *
+        *  - HNS3_SPECIAL_PORT_SW_CKSUM_MODE
+        *     In this mode, HW can not do checksum for special UDP port like
+        *     4789, 4790, 6081 for non-tunnel UDP packets and UDP tunnel
+        *     packets without the PKT_TX_TUNEL_MASK in the mbuf. So, PMD need
+        *     do the checksum for these packets to avoid a checksum error.
+        *
+        *  - HNS3_SPECIAL_PORT_HW_CKSUM_MODE
+        *     In this mode, HW does not have the preceding problems and can
+        *     directly calculate the checksum of these UDP packets.
+        */
+       uint8_t udp_cksum_mode;
        /*
         * The minimum length of the packet supported by hardware in the Tx
         * direction.
@@ -500,6 +521,7 @@ struct hns3_queue_info {
 };
 
 #define HNS3_TX_CKSUM_OFFLOAD_MASK ( \
+       PKT_TX_OUTER_UDP_CKSUM | \
        PKT_TX_OUTER_IP_CKSUM | \
        PKT_TX_IP_CKSUM | \
        PKT_TX_TCP_SEG | \
@@ -513,19 +535,53 @@ enum hns3_cksum_status {
        HNS3_OUTER_L4_CKSUM_ERR = 8
 };
 
-static inline int
-hns3_handle_bdinfo(struct hns3_rx_queue *rxq, struct rte_mbuf *rxm,
-                  uint32_t bd_base_info, uint32_t l234_info,
-                  uint32_t *cksum_err)
+extern uint64_t hns3_timestamp_rx_dynflag;
+extern int hns3_timestamp_dynfield_offset;
+
+static inline void
+hns3_rx_set_cksum_flag(struct hns3_rx_queue *rxq,
+                      struct rte_mbuf *rxm,
+                      uint32_t l234_info)
 {
-#define L2E_TRUNC_ERR_FLAG     (BIT(HNS3_RXD_L2E_B) | \
-                                BIT(HNS3_RXD_TRUNCATE_B))
-#define CHECKSUM_ERR_FLAG      (BIT(HNS3_RXD_L3E_B) | \
+#define HNS3_RXD_CKSUM_ERR_MASK        (BIT(HNS3_RXD_L3E_B) | \
                                 BIT(HNS3_RXD_L4E_B) | \
                                 BIT(HNS3_RXD_OL3E_B) | \
                                 BIT(HNS3_RXD_OL4E_B))
 
-       uint32_t tmp = 0;
+       if (likely((l234_info & HNS3_RXD_CKSUM_ERR_MASK) == 0)) {
+               rxm->ol_flags |= (PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD);
+               return;
+       }
+
+       if (unlikely(l234_info & BIT(HNS3_RXD_L3E_B))) {
+               rxm->ol_flags |= PKT_RX_IP_CKSUM_BAD;
+               rxq->dfx_stats.l3_csum_errors++;
+       } else {
+               rxm->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
+       }
+
+       if (unlikely(l234_info & BIT(HNS3_RXD_L4E_B))) {
+               rxm->ol_flags |= PKT_RX_L4_CKSUM_BAD;
+               rxq->dfx_stats.l4_csum_errors++;
+       } else {
+               rxm->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
+       }
+
+       if (unlikely(l234_info & BIT(HNS3_RXD_OL3E_B)))
+               rxq->dfx_stats.ol3_csum_errors++;
+
+       if (unlikely(l234_info & BIT(HNS3_RXD_OL4E_B))) {
+               rxm->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
+               rxq->dfx_stats.ol4_csum_errors++;
+       }
+}
+
+static inline int
+hns3_handle_bdinfo(struct hns3_rx_queue *rxq, struct rte_mbuf *rxm,
+                  uint32_t bd_base_info, uint32_t l234_info)
+{
+#define L2E_TRUNC_ERR_FLAG     (BIT(HNS3_RXD_L2E_B) | \
+                                BIT(HNS3_RXD_TRUNCATE_B))
 
        /*
         * If packet len bigger than mtu when recv with no-scattered algorithm,
@@ -544,88 +600,39 @@ hns3_handle_bdinfo(struct hns3_rx_queue *rxq, struct rte_mbuf *rxm,
                return -EINVAL;
        }
 
-       if (bd_base_info & BIT(HNS3_RXD_L3L4P_B)) {
-               if (likely((l234_info & CHECKSUM_ERR_FLAG) == 0)) {
-                       *cksum_err = 0;
-                       return 0;
-               }
-
-               if (unlikely(l234_info & BIT(HNS3_RXD_L3E_B))) {
-                       rxm->ol_flags |= PKT_RX_IP_CKSUM_BAD;
-                       rxq->dfx_stats.l3_csum_errors++;
-                       tmp |= HNS3_L3_CKSUM_ERR;
-               }
-
-               if (unlikely(l234_info & BIT(HNS3_RXD_L4E_B))) {
-                       rxm->ol_flags |= PKT_RX_L4_CKSUM_BAD;
-                       rxq->dfx_stats.l4_csum_errors++;
-                       tmp |= HNS3_L4_CKSUM_ERR;
-               }
-
-               if (unlikely(l234_info & BIT(HNS3_RXD_OL3E_B))) {
-                       rxq->dfx_stats.ol3_csum_errors++;
-                       tmp |= HNS3_OUTER_L3_CKSUM_ERR;
-               }
-
-               if (unlikely(l234_info & BIT(HNS3_RXD_OL4E_B))) {
-                       rxm->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
-                       rxq->dfx_stats.ol4_csum_errors++;
-                       tmp |= HNS3_OUTER_L4_CKSUM_ERR;
-               }
-       }
-       *cksum_err = tmp;
+       if (bd_base_info & BIT(HNS3_RXD_L3L4P_B))
+               hns3_rx_set_cksum_flag(rxq, rxm, l234_info);
 
        return 0;
 }
 
-static inline void
-hns3_rx_set_cksum_flag(struct rte_mbuf *rxm, const uint64_t packet_type,
-                      const uint32_t cksum_err)
-{
-       if (unlikely((packet_type & RTE_PTYPE_TUNNEL_MASK))) {
-               if (likely(packet_type & RTE_PTYPE_INNER_L3_MASK) &&
-                   (cksum_err & HNS3_L3_CKSUM_ERR) == 0)
-                       rxm->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
-               if (likely(packet_type & RTE_PTYPE_INNER_L4_MASK) &&
-                   (cksum_err & HNS3_L4_CKSUM_ERR) == 0)
-                       rxm->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
-               if (likely(packet_type & RTE_PTYPE_L4_MASK) &&
-                   (cksum_err & HNS3_OUTER_L4_CKSUM_ERR) == 0)
-                       rxm->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
-       } else {
-               if (likely(packet_type & RTE_PTYPE_L3_MASK) &&
-                   (cksum_err & HNS3_L3_CKSUM_ERR) == 0)
-                       rxm->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
-               if (likely(packet_type & RTE_PTYPE_L4_MASK) &&
-                   (cksum_err & HNS3_L4_CKSUM_ERR) == 0)
-                       rxm->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
-       }
-}
-
 static inline uint32_t
 hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info,
                   const uint32_t ol_info)
 {
        const struct hns3_ptype_table * const ptype_tbl = rxq->ptype_tbl;
-       uint32_t l2id, l3id, l4id;
-       uint32_t ol3id, ol4id, ol2id;
+       uint32_t ol3id, ol4id;
+       uint32_t l3id, l4id;
+       uint32_t ptype;
+
+       if (rxq->ptype_en) {
+               ptype = hns3_get_field(ol_info, HNS3_RXD_PTYPE_M,
+                                      HNS3_RXD_PTYPE_S);
+               return ptype_tbl->ptype[ptype];
+       }
 
        ol4id = hns3_get_field(ol_info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
        ol3id = hns3_get_field(ol_info, HNS3_RXD_OL3ID_M, HNS3_RXD_OL3ID_S);
-       ol2id = hns3_get_field(ol_info, HNS3_RXD_OVLAN_M, HNS3_RXD_OVLAN_S);
-       l2id = hns3_get_field(l234_info, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S);
        l3id = hns3_get_field(l234_info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
        l4id = hns3_get_field(l234_info, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S);
 
        if (unlikely(ptype_tbl->ol4table[ol4id]))
-               return ptype_tbl->inner_l2table[l2id] |
-                       ptype_tbl->inner_l3table[l3id] |
+               return ptype_tbl->inner_l3table[l3id] |
                        ptype_tbl->inner_l4table[l4id] |
                        ptype_tbl->ol3table[ol3id] |
-                       ptype_tbl->ol4table[ol4id] | ptype_tbl->ol2table[ol2id];
+                       ptype_tbl->ol4table[ol4id];
        else
-               return ptype_tbl->l2l3table[l2id][l3id] |
-                       ptype_tbl->l4table[l4id];
+               return ptype_tbl->l3table[l3id] | ptype_tbl->l4table[l4id];
 }
 
 void hns3_dev_rx_queue_release(void *queue);
@@ -652,8 +659,8 @@ int hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int hns3_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 int hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
-uint16_t hns3_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
-                       uint16_t nb_pkts);
+uint16_t hns3_recv_pkts_simple(void *rx_queue, struct rte_mbuf **rx_pkts,
+                               uint16_t nb_pkts);
 uint16_t hns3_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
                                  uint16_t nb_pkts);
 uint16_t hns3_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
@@ -680,6 +687,7 @@ int hns3_tx_burst_mode_get(struct rte_eth_dev *dev,
 const uint32_t *hns3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 void hns3_init_rx_ptype_tble(struct rte_eth_dev *dev);
 void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev);
+uint32_t hns3_get_tqp_intr_reg_offset(uint16_t tqp_intr_id);
 void hns3_set_queue_intr_gl(struct hns3_hw *hw, uint16_t queue_id,
                            uint8_t gl_idx, uint16_t gl_value);
 void hns3_set_queue_intr_rl(struct hns3_hw *hw, uint16_t queue_id,
@@ -705,5 +713,9 @@ int hns3_start_all_txqs(struct rte_eth_dev *dev);
 int hns3_start_all_rxqs(struct rte_eth_dev *dev);
 void hns3_stop_all_txqs(struct rte_eth_dev *dev);
 void hns3_restore_tqp_enable_state(struct hns3_hw *hw);
+int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
+void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
+int hns3_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
 
 #endif /* _HNS3_RXTX_H_ */