#define HNS3_RXD_OL3ID_M (0xf << HNS3_RXD_OL3ID_S)
#define HNS3_RXD_OL4ID_S 8
#define HNS3_RXD_OL4ID_M (0xf << HNS3_RXD_OL4ID_S)
+#define HNS3_RXD_PTYPE_S 4
+#define HNS3_RXD_PTYPE_M (0xff << HNS3_RXD_PTYPE_S)
#define HNS3_RXD_FBHI_S 12
#define HNS3_RXD_FBHI_M (0x3 << HNS3_RXD_FBHI_S)
#define HNS3_RXD_FBLI_S 14
#define HNS3_TXD_MSS_S 0
#define HNS3_TXD_MSS_M (0x3fff << HNS3_TXD_MSS_S)
+#define HNS3_TXD_OL4CS_B 22
#define HNS3_L2_LEN_UNIT 1UL
#define HNS3_L3_LEN_UNIT 2UL
#define HNS3_L4_LEN_UNIT 2UL
};
};
- uint32_t paylen;
+ uint32_t paylen_fd_dop_ol4cs;
uint16_t tp_fe_sc_vld_ra_ri;
uint16_t mss;
} tx;
* point, the pvid_sw_discard_en will be false.
*/
bool pvid_sw_discard_en;
+ bool ptype_en; /* indicate if the ptype field enabled */
bool enabled; /* indicate if Rx queue has been enabled */
struct hns3_rx_basic_stats basic_stats;
};
#define HNS3_TX_CKSUM_OFFLOAD_MASK ( \
+ PKT_TX_OUTER_UDP_CKSUM | \
PKT_TX_OUTER_IP_CKSUM | \
PKT_TX_IP_CKSUM | \
PKT_TX_TCP_SEG | \
const struct hns3_ptype_table * const ptype_tbl = rxq->ptype_tbl;
uint32_t l2id, l3id, l4id;
uint32_t ol3id, ol4id, ol2id;
+ uint32_t ptype;
+
+ if (rxq->ptype_en) {
+ ptype = hns3_get_field(ol_info, HNS3_RXD_PTYPE_M,
+ HNS3_RXD_PTYPE_S);
+ return ptype_tbl->ptype[ptype];
+ }
ol4id = hns3_get_field(ol_info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
ol3id = hns3_get_field(ol_info, HNS3_RXD_OL3ID_M, HNS3_RXD_OL3ID_S);
int hns3_start_all_rxqs(struct rte_eth_dev *dev);
void hns3_stop_all_txqs(struct rte_eth_dev *dev);
void hns3_restore_tqp_enable_state(struct hns3_hw *hw);
+int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
+void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
+int hns3_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
#endif /* _HNS3_RXTX_H_ */