static void hns3_tqp_stats_clear(struct hns3_hw *hw);
-/*
- * Query all the MAC statistics data of Network ICL command ,opcode id: 0x0034.
- * This command is used before send 'query_mac_stat command', the descriptor
- * number of 'query_mac_stat command' must match with reg_num in this command.
- * @praram hw
- * Pointer to structure hns3_hw.
- * @return
- * 0 on success.
- */
static int
-hns3_update_mac_stats(struct hns3_hw *hw, const uint32_t desc_num)
+hns3_update_mac_stats(struct hns3_hw *hw)
{
+#define HNS3_MAC_STATS_REG_NUM_PER_DESC 4
+
uint64_t *data = (uint64_t *)(&hw->mac_stats);
struct hns3_cmd_desc *desc;
+ uint32_t stats_iterms;
uint64_t *desc_data;
- uint16_t i, k, n;
+ uint32_t desc_num;
+ uint16_t i;
int ret;
+ /* The first desc has a 64-bit header, so need to consider it. */
+ desc_num = hw->mac_stats_reg_num / HNS3_MAC_STATS_REG_NUM_PER_DESC + 1;
desc = rte_malloc("hns3_mac_desc",
desc_num * sizeof(struct hns3_cmd_desc), 0);
if (desc == NULL) {
return ret;
}
- for (i = 0; i < desc_num; i++) {
- /* For special opcode 0034, only the first desc has the head */
- if (i == 0) {
- desc_data = (uint64_t *)(&desc[i].data[0]);
- n = HNS3_RD_FIRST_STATS_NUM;
- } else {
- desc_data = (uint64_t *)(&desc[i]);
- n = HNS3_RD_OTHER_STATS_NUM;
- }
-
- for (k = 0; k < n; k++) {
- *data += rte_le_to_cpu_64(*desc_data);
- data++;
- desc_data++;
- }
+ stats_iterms = RTE_MIN(sizeof(hw->mac_stats) / sizeof(uint64_t),
+ hw->mac_stats_reg_num);
+ desc_data = (uint64_t *)(&desc[0].data[0]);
+ for (i = 0; i < stats_iterms; i++) {
+ /*
+ * Data memory is continuous and only the first descriptor has a
+ * header in this command.
+ */
+ *data += rte_le_to_cpu_64(*desc_data);
+ data++;
+ desc_data++;
}
rte_free(desc);
return 0;
}
-/*
- * Query Mac stat reg num command ,opcode id: 0x0033.
- * This command is used before send 'query_mac_stat command', the descriptor
- * number of 'query_mac_stat command' must match with reg_num in this command.
- * @praram rte_stats
- * Pointer to structure rte_eth_stats.
- * @return
- * 0 on success.
- */
static int
-hns3_mac_query_reg_num(struct rte_eth_dev *dev, uint32_t *desc_num)
+hns3_mac_query_reg_num(struct hns3_hw *hw, uint32_t *reg_num)
{
- struct hns3_adapter *hns = dev->data->dev_private;
- struct hns3_hw *hw = &hns->hw;
+#define HNS3_MAC_STATS_RSV_REG_NUM_ON_HIP08_B 3
struct hns3_cmd_desc desc;
- uint32_t *desc_data;
- uint32_t reg_num;
int ret;
hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_MAC_REG_NUM, true);
ret = hns3_cmd_send(hw, &desc, 1);
- if (ret)
+ if (ret) {
+ hns3_err(hw, "failed to query MAC statistic reg number, ret = %d",
+ ret);
return ret;
+ }
- /*
- * The num of MAC statistics registers that are provided by IMP in this
- * version.
- */
- desc_data = (uint32_t *)(&desc.data[0]);
- reg_num = rte_le_to_cpu_32(*desc_data);
+ /* The number of MAC statistics registers are provided by firmware. */
+ *reg_num = rte_le_to_cpu_32(desc.data[0]);
+ if (*reg_num == 0) {
+ hns3_err(hw, "MAC statistic reg number is invalid!");
+ return -ENODATA;
+ }
/*
- * The descriptor number of 'query_additional_mac_stat command' is
- * '1 + (reg_num-3)/4 + ((reg_num-3)%4 !=0)';
- * This value is 83 in this version
+ * If driver doesn't request the firmware to report more MAC statistics
+ * iterms and the total number of MAC statistics registers by using new
+ * method, firmware will only reports the number of valid statistics
+ * registers. However, structure hns3_mac_stats in driver contains valid
+ * and reserved statistics iterms. In this case, the total register
+ * number must be added to three reserved statistics registers.
*/
- *desc_num = 1 + ((reg_num - 3) >> 2) +
- (uint32_t)(((reg_num - 3) & 0x3) ? 1 : 0);
+ *reg_num += HNS3_MAC_STATS_RSV_REG_NUM_ON_HIP08_B;
+
+ return 0;
+}
+
+int
+hns3_query_mac_stats_reg_num(struct hns3_hw *hw)
+{
+ uint32_t mac_stats_reg_num = 0;
+ int ret;
+
+ ret = hns3_mac_query_reg_num(hw, &mac_stats_reg_num);
+ if (ret)
+ return ret;
+
+ hw->mac_stats_reg_num = mac_stats_reg_num;
+ if (hw->mac_stats_reg_num > sizeof(hw->mac_stats) / sizeof(uint64_t))
+ hns3_warn(hw, "MAC stats reg number from firmware is greater than stats iterms in driver.");
return 0;
}
{
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_hw *hw = &hns->hw;
- uint32_t desc_num;
- int ret;
- ret = hns3_mac_query_reg_num(dev, &desc_num);
- if (ret == 0)
- ret = hns3_update_mac_stats(hw, desc_num);
- else
- hns3_err(hw, "Query mac reg num fail : %d", ret);
- return ret;
+ return hns3_update_mac_stats(hw);
}
static int
return 0;
}
-int
+static int
hns3_update_imissed_stats(struct hns3_hw *hw, bool is_clear)
{
struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
return 0;
}
+static void
+hns3_rcb_rx_ring_stats_get(struct hns3_rx_queue *rxq,
+ struct hns3_tqp_stats *stats)
+{
+ uint32_t cnt;
+
+ cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG);
+ stats->rcb_rx_ring_pktnum_rcd += cnt;
+ stats->rcb_rx_ring_pktnum[rxq->queue_id] += cnt;
+}
+
+static void
+hns3_rcb_tx_ring_stats_get(struct hns3_tx_queue *txq,
+ struct hns3_tqp_stats *stats)
+{
+ uint32_t cnt;
+
+ cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG);
+ stats->rcb_tx_ring_pktnum_rcd += cnt;
+ stats->rcb_tx_ring_pktnum[txq->queue_id] += cnt;
+}
+
/*
* Query tqp tx queue statistics ,opcode id: 0x0B03.
* Query tqp rx queue statistics ,opcode id: 0x0B13.
struct hns3_tqp_stats *stats = &hw->tqp_stats;
struct hns3_rx_queue *rxq;
struct hns3_tx_queue *txq;
- uint64_t cnt;
uint16_t i;
int ret;
/* Update imissed stats */
ret = hns3_update_imissed_stats(hw, false);
if (ret) {
- hns3_err(hw, "update imissed stats failed, ret = %d",
- ret);
- return ret;
+ hns3_err(hw, "update imissed stats failed, ret = %d", ret);
+ goto out;
}
rte_stats->imissed = imissed_stats->rpu_rx_drop_cnt +
imissed_stats->ssu_rx_drop_cnt;
if (rxq == NULL)
continue;
- cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG);
- /*
- * Read hardware and software in adjacent positions to minimize
- * the timing variance.
- */
+ rte_spinlock_lock(&hw->stats_lock);
+ hns3_rcb_rx_ring_stats_get(rxq, stats);
+ rte_spinlock_unlock(&hw->stats_lock);
+
rte_stats->ierrors += rxq->err_stats.l2_errors +
rxq->err_stats.pkt_len_errors;
- stats->rcb_rx_ring_pktnum_rcd += cnt;
- stats->rcb_rx_ring_pktnum[i] += cnt;
rte_stats->ibytes += rxq->basic_stats.bytes;
}
if (txq == NULL)
continue;
- cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG);
- stats->rcb_tx_ring_pktnum_rcd += cnt;
- stats->rcb_tx_ring_pktnum[i] += cnt;
+ rte_spinlock_lock(&hw->stats_lock);
+ hns3_rcb_tx_ring_stats_get(txq, stats);
+ rte_spinlock_unlock(&hw->stats_lock);
rte_stats->obytes += txq->basic_stats.bytes;
}
ret = hns3_update_oerror_stats(hw, false);
if (ret) {
- hns3_err(hw, "update oerror stats failed, ret = %d",
- ret);
- return ret;
+ hns3_err(hw, "update oerror stats failed, ret = %d", ret);
+ goto out;
}
rte_stats->oerrors = hw->oerror_stats;
rte_stats->opackets = stats->rcb_tx_ring_pktnum_rcd -
rte_stats->oerrors;
rte_stats->rx_nombuf = eth_dev->data->rx_mbuf_alloc_failed;
-
- return 0;
+out:
+ return ret;
}
int
ret = hns3_update_imissed_stats(hw, true);
if (ret) {
hns3_err(hw, "clear imissed stats failed, ret = %d", ret);
- return ret;
+ goto out;
}
/*
*/
ret = hns3_update_oerror_stats(hw, true);
if (ret) {
- hns3_err(hw, "clear oerror stats failed, ret = %d",
- ret);
- return ret;
+ hns3_err(hw, "clear oerror stats failed, ret = %d", ret);
+ goto out;
}
for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
if (rxq == NULL)
continue;
+ rte_spinlock_lock(&hw->stats_lock);
memset(&rxq->basic_stats, 0,
sizeof(struct hns3_rx_basic_stats));
(void)hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG);
rxq->err_stats.pkt_len_errors = 0;
rxq->err_stats.l2_errors = 0;
+ rte_spinlock_unlock(&hw->stats_lock);
}
/* Clear all the stats of a txq in a loop to keep them synchronized */
if (txq == NULL)
continue;
+ rte_spinlock_lock(&hw->stats_lock);
memset(&txq->basic_stats, 0,
sizeof(struct hns3_tx_basic_stats));
/* This register is read-clear */
(void)hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG);
+ rte_spinlock_unlock(&hw->stats_lock);
}
+ rte_spinlock_lock(&hw->stats_lock);
hns3_tqp_stats_clear(hw);
-
- return 0;
+ rte_spinlock_unlock(&hw->stats_lock);
+out:
+ return ret;
}
static int
struct hns3_rx_basic_stats *rxq_stats;
struct hns3_rx_queue *rxq;
uint16_t i, j;
- uint32_t cnt;
char *val;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
if (rxq == NULL)
continue;
- cnt = hns3_read_dev(rxq, HNS3_RING_RX_PKTNUM_RECORD_REG);
- /*
- * Read hardware and software in adjacent positions to minimize
- * the time difference.
- */
+ hns3_rcb_rx_ring_stats_get(rxq, stats);
rxq_stats = &rxq->basic_stats;
rxq_stats->errors = rxq->err_stats.l2_errors +
rxq->err_stats.pkt_len_errors;
- stats->rcb_rx_ring_pktnum_rcd += cnt;
- stats->rcb_rx_ring_pktnum[i] += cnt;
/*
* If HW statistics are reset by stats_reset, but a lot of
struct hns3_tx_basic_stats *txq_stats;
struct hns3_tx_queue *txq;
uint16_t i, j;
- uint32_t cnt;
char *val;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
if (txq == NULL)
continue;
- cnt = hns3_read_dev(txq, HNS3_RING_TX_PKTNUM_RECORD_REG);
- stats->rcb_tx_ring_pktnum_rcd += cnt;
- stats->rcb_tx_ring_pktnum[i] += cnt;
+ hns3_rcb_tx_ring_stats_get(txq, stats);
txq_stats = &txq->basic_stats;
txq_stats->packets = stats->rcb_tx_ring_pktnum[i];
* @praram xstats
* A pointer to a table of structure of type *rte_eth_xstat*
* to be filled with device statistics ids and values.
- * This parameter can be set to NULL if n is 0.
+ * This parameter can be set to NULL if and only if n is 0.
* @param n
* The size of the xstats array (number of elements).
+ * If lower than the required number of elements, the function returns the
+ * required number of elements.
+ * If equal to zero, the xstats parameter must be NULL, the function returns
+ * the required number of elements.
* @return
* 0 on fail, count(The size of the statistics elements) on success.
*/
int count;
int ret;
- if (xstats == NULL)
- return 0;
-
count = hns3_xstats_calc_num(dev);
if ((int)n < count)
return count;
count = 0;
+ rte_spinlock_lock(&hw->stats_lock);
hns3_tqp_basic_stats_get(dev, xstats, &count);
if (!hns->is_vf) {
ret = hns3_query_update_mac_stats(dev);
if (ret < 0) {
hns3_err(hw, "Update Mac stats fail : %d", ret);
+ rte_spinlock_unlock(&hw->stats_lock);
return ret;
}
count++;
}
}
+ rte_spinlock_unlock(&hw->stats_lock);
ret = hns3_update_imissed_stats(hw, false);
if (ret) {
- hns3_err(hw, "update imissed stats failed, ret = %d",
- ret);
+ hns3_err(hw, "update imissed stats failed, ret = %d", ret);
return ret;
}
}
}
+ rte_spinlock_lock(&hw->stats_lock);
hns3_tqp_dfx_stats_get(dev, xstats, &count);
hns3_queue_stats_get(dev, xstats, &count);
+ rte_spinlock_unlock(&hw->stats_lock);
return count;
}
hns3_dev_xstats_reset(struct rte_eth_dev *dev)
{
struct hns3_adapter *hns = dev->data->dev_private;
+ struct hns3_hw *hw = &hns->hw;
int ret;
/* Clear tqp stats */
if (ret)
return ret;
+ rte_spinlock_lock(&hw->stats_lock);
hns3_tqp_dfx_stats_clear(dev);
/* Clear reset stats */
memset(&hns->hw.reset.stats, 0, sizeof(struct hns3_reset_stats));
if (hns->is_vf)
- return 0;
+ goto out;
/* HW registers are cleared on read */
ret = hns3_mac_stats_reset(dev);
- if (ret)
- return ret;
- return 0;
+out:
+ rte_spinlock_unlock(&hw->stats_lock);
+
+ return ret;
}
-int
+static int
hns3_tqp_stats_init(struct hns3_hw *hw)
{
struct hns3_tqp_stats *tqp_stats = &hw->tqp_stats;
return 0;
}
-void
+static void
hns3_tqp_stats_uninit(struct hns3_hw *hw)
{
struct hns3_tqp_stats *tqp_stats = &hw->tqp_stats;
memset(stats->rcb_rx_ring_pktnum, 0, sizeof(uint64_t) * hw->tqps_num);
memset(stats->rcb_tx_ring_pktnum, 0, sizeof(uint64_t) * hw->tqps_num);
}
+
+int
+hns3_stats_init(struct hns3_hw *hw)
+{
+ int ret;
+
+ rte_spinlock_init(&hw->stats_lock);
+ /* Hardware statistics of imissed registers cleared. */
+ ret = hns3_update_imissed_stats(hw, true);
+ if (ret) {
+ hns3_err(hw, "clear imissed stats failed, ret = %d", ret);
+ return ret;
+ }
+
+ return hns3_tqp_stats_init(hw);
+}
+
+void
+hns3_stats_uninit(struct hns3_hw *hw)
+{
+ hns3_tqp_stats_uninit(hw);
+}
+
+static void
+hns3_update_queues_stats(struct hns3_hw *hw)
+{
+ struct rte_eth_dev_data *data = hw->data;
+ struct hns3_rx_queue *rxq;
+ struct hns3_tx_queue *txq;
+ uint16_t i;
+
+ for (i = 0; i < data->nb_rx_queues; i++) {
+ rxq = data->rx_queues[i];
+ if (rxq != NULL)
+ hns3_rcb_rx_ring_stats_get(rxq, &hw->tqp_stats);
+ }
+
+ for (i = 0; i < data->nb_tx_queues; i++) {
+ txq = data->tx_queues[i];
+ if (txq != NULL)
+ hns3_rcb_tx_ring_stats_get(txq, &hw->tqp_stats);
+ }
+}
+
+/*
+ * Some hardware statistics registers are not 64-bit. If hardware statistics are
+ * not obtained for a long time, these statistics may be reversed. This function
+ * is used to update these hardware statistics in periodic task.
+ */
+void
+hns3_update_hw_stats(struct hns3_hw *hw)
+{
+ struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
+
+ rte_spinlock_lock(&hw->stats_lock);
+ if (!hns->is_vf)
+ hns3_update_mac_stats(hw);
+
+ hns3_update_queues_stats(hw);
+ rte_spinlock_unlock(&hw->stats_lock);
+}