net/hns3: replace max private macro

[dpdk.git] / drivers / net / hns3 / hns3_stats.c

diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c
index ad27620..f2918fc 100644 (file)
--- a/drivers/net/hns3/hns3_stats.c
+++ b/drivers/net/hns3/hns3_stats.c
@@ -189,15 +189,61 @@ static const struct hns3_xstats_name_offset hns3_mac_strings[] = {
 
 static const struct hns3_xstats_name_offset hns3_error_int_stats_strings[] = {
        {"MAC_AFIFO_TNL_INT_R",
-               HNS3_ERR_INT_STATS_FIELD_OFFSET(mac_afifo_tnl_intr_cnt)},
-       {"PPU_MPF_ABNORMAL_INT_ST2",
-               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abnormal_intr_st2_cnt)},
-       {"SSU_PORT_BASED_ERR_INT",
-               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_port_based_pf_intr_cnt)},
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(mac_afifo_tnl_int_cnt)},
+       {"PPU_MPF_ABNORMAL_INT_ST2_MSIX",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abn_int_st2_msix_cnt)},
+       {"SSU_PORT_BASED_ERR_INT_MSIX",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_port_based_pf_int_cnt)},
        {"PPP_PF_ABNORMAL_INT_ST0",
-               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppp_pf_abnormal_intr_cnt)},
-       {"PPU_PF_ABNORMAL_INT_ST",
-               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_pf_abnormal_intr_cnt)}
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppp_pf_abnormal_int_cnt)},
+       {"PPU_PF_ABNORMAL_INT_ST_MSIX",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_pf_abnormal_int_msix_cnt)},
+       {"IMP_TCM_ECC_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(imp_tcm_ecc_int_cnt)},
+       {"CMDQ_MEM_ECC_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(cmdq_mem_ecc_int_cnt)},
+       {"IMP_RD_POISON_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(imp_rd_poison_int_cnt)},
+       {"TQP_INT_ECC_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(tqp_int_ecc_int_cnt)},
+       {"MSIX_ECC_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(msix_ecc_int_cnt)},
+       {"SSU_ECC_MULTI_BIT_INT_0",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_ecc_multi_bit_int_0_cnt)},
+       {"SSU_ECC_MULTI_BIT_INT_1",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_ecc_multi_bit_int_1_cnt)},
+       {"SSU_COMMON_ERR_INT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_common_ecc_int_cnt)},
+       {"IGU_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(igu_int_cnt)},
+       {"PPP_MPF_ABNORMAL_INT_ST1",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppp_mpf_abnormal_int_st1_cnt)},
+       {"PPP_MPF_ABNORMAL_INT_ST3",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppp_mpf_abnormal_int_st3_cnt)},
+       {"PPU_MPF_ABNORMAL_INT_ST1",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abnormal_int_st1_cnt)},
+       {"PPU_MPF_ABNORMAL_INT_ST2_RAS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abn_int_st2_ras_cnt)},
+       {"PPU_MPF_ABNORMAL_INT_ST3",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abnormal_int_st3_cnt)},
+       {"TM_SCH_RINT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(tm_sch_int_cnt)},
+       {"QCN_FIFO_RINT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(qcn_fifo_int_cnt)},
+       {"QCN_ECC_RINT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(qcn_ecc_int_cnt)},
+       {"NCSI_ECC_INT_RPT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ncsi_ecc_int_cnt)},
+       {"SSU_PORT_BASED_ERR_INT_RAS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_port_based_err_int_cnt)},
+       {"SSU_FIFO_OVERFLOW_INT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_fifo_overflow_int_cnt)},
+       {"SSU_ETS_TCG_INT",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_ets_tcg_int_cnt)},
+       {"IGU_EGU_TNL_INT_STS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(igu_egu_tnl_int_cnt)},
+       {"PPU_PF_ABNORMAL_INT_ST_RAS",
+               HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_pf_abnormal_int_ras_cnt)},
 };
 
 /* The statistic of reset */
@@ -527,6 +573,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev)
                if (ret) {
                        hns3_err(hw, "Failed to reset RX No.%d queue stat: %d",
                                 i, ret);
+                       return ret;
                }
 
                hns3_cmd_setup_basic_desc(&desc_reset, HNS3_OPC_QUERY_TX_STATUS,
@@ -537,6 +584,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev)
                if (ret) {
                        hns3_err(hw, "Failed to reset TX No.%d queue stat: %d",
                                 i, ret);
+                       return ret;
                }
        }
 
@@ -571,7 +619,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev)
        return 0;
 }
 
-static void
+static int
 hns3_mac_stats_reset(__rte_unused struct rte_eth_dev *dev)
 {
        struct hns3_adapter *hns = dev->data->dev_private;
@@ -580,10 +628,14 @@ hns3_mac_stats_reset(__rte_unused struct rte_eth_dev *dev)
        int ret;
 
        ret = hns3_query_update_mac_stats(dev);
-       if (ret)
+       if (ret) {
                hns3_err(hw, "Clear Mac stats fail : %d", ret);
+               return ret;
+       }
 
        memset(mac_stats, 0, sizeof(struct hns3_mac_stats));
+
+       return 0;
 }
 
 /* This function calculates the number of xstats based on the current config */
@@ -639,6 +691,22 @@ hns3_get_queue_stats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 
 }
 
+void
+hns3_error_int_stats_add(struct hns3_adapter *hns, const char *err)
+{
+       struct hns3_pf *pf = &hns->pf;
+       uint16_t i;
+       char *addr;
+
+       for (i = 0; i < HNS3_NUM_ERROR_INT_XSTATS; i++) {
+               if (strcmp(hns3_error_int_stats_strings[i].name, err) == 0) {
+                       addr = (char *)&pf->abn_int_stats +
+                               hns3_error_int_stats_strings[i].offset;
+                       *(uint64_t *)addr += 1;
+               }
+       }
+}
+
 /*
  * Retrieve extended(tqp | Mac) statistics of an Ethernet device.
  * @param dev
@@ -979,9 +1047,13 @@ hns3_dev_xstats_reset(struct rte_eth_dev *dev)
 {
        struct hns3_adapter *hns = dev->data->dev_private;
        struct hns3_pf *pf = &hns->pf;
+       int ret;
 
        /* Clear tqp stats */
-       (void)hns3_stats_reset(dev);
+       ret = hns3_stats_reset(dev);
+       if (ret)
+               return ret;
+
        /* Clear reset stats */
        memset(&hns->hw.reset.stats, 0, sizeof(struct hns3_reset_stats));
 
@@ -989,7 +1061,10 @@ hns3_dev_xstats_reset(struct rte_eth_dev *dev)
                return 0;
 
        /* HW registers are cleared on read */
-       hns3_mac_stats_reset(dev);
+       ret = hns3_mac_stats_reset(dev);
+       if (ret)
+               return ret;
+
        /* Clear error stats */
        memset(&pf->abn_int_stats, 0, sizeof(struct hns3_err_msix_intr_stats));