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mempool: rework comments and style
[dpdk.git] / drivers / net / i40e / base / i40e_adminq.c
diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index b2a96fa..222add4 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -69,6 +69,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
                hw->aq.arq.len  = I40E_VF_ARQLEN1;
                hw->aq.arq.bal  = I40E_VF_ARQBAL1;
                hw->aq.arq.bah  = I40E_VF_ARQBAH1;
+#ifdef PF_DRIVER
        } else {
                hw->aq.asq.tail = I40E_PF_ATQT;
                hw->aq.asq.head = I40E_PF_ATQH;
@@ -80,6 +81,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
                hw->aq.arq.len  = I40E_PF_ARQLEN;
                hw->aq.arq.bal  = I40E_PF_ARQBAL;
                hw->aq.arq.bah  = I40E_PF_ARQBAH;
+#endif
        }
 }
 
@@ -316,8 +318,26 @@ STATIC enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)
        wr32(hw, hw->aq.asq.tail, 0);
 
        /* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                         I40E_PF_ATQLEN_ATQENABLE_MASK));
+#else
        wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
                                  I40E_PF_ATQLEN_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                         I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#else
+       wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                 I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
        wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
 
@@ -345,8 +365,26 @@ STATIC enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)
        wr32(hw, hw->aq.arq.tail, 0);
 
        /* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                         I40E_PF_ARQLEN_ARQENABLE_MASK));
+#else
        wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
                                  I40E_PF_ARQLEN_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                         I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#else
+       wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                 I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
        wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
 
@@ -393,7 +431,6 @@ enum i40e_status_code i40e_init_asq(struct i40e_hw *hw)
 
        hw->aq.asq.next_to_use = 0;
        hw->aq.asq.next_to_clean = 0;
-       hw->aq.asq.count = hw->aq.num_asq_entries;
 
        /* allocate the ring memory */
        ret_code = i40e_alloc_adminq_asq_ring(hw);
@@ -411,6 +448,7 @@ enum i40e_status_code i40e_init_asq(struct i40e_hw *hw)
                goto init_adminq_free_rings;
 
        /* success! */
+       hw->aq.asq.count = hw->aq.num_asq_entries;
        goto init_adminq_exit;
 
 init_adminq_free_rings:
@@ -452,7 +490,6 @@ enum i40e_status_code i40e_init_arq(struct i40e_hw *hw)
 
        hw->aq.arq.next_to_use = 0;
        hw->aq.arq.next_to_clean = 0;
-       hw->aq.arq.count = hw->aq.num_arq_entries;
 
        /* allocate the ring memory */
        ret_code = i40e_alloc_adminq_arq_ring(hw);
@@ -470,6 +507,7 @@ enum i40e_status_code i40e_init_arq(struct i40e_hw *hw)
                goto init_adminq_free_rings;
 
        /* success! */
+       hw->aq.arq.count = hw->aq.num_arq_entries;
        goto init_adminq_exit;
 
 init_adminq_free_rings:
@@ -709,16 +747,16 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
 
        desc = I40E_ADMINQ_DESC(*asq, ntc);
        details = I40E_ADMINQ_DETAILS(*asq, ntc);
+
        while (rd32(hw, hw->aq.asq.head) != ntc) {
                i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
-                          "%s: ntc %d head %d.\n", __FUNCTION__, ntc,
-                          rd32(hw, hw->aq.asq.head));
+                          "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
 
                if (details->callback) {
                        I40E_ADMINQ_CALLBACK cb_func =
                                        (I40E_ADMINQ_CALLBACK)details->callback;
-                       i40e_memcpy(&desc_cb, desc,
-                                   sizeof(struct i40e_aq_desc), I40E_DMA_TO_DMA);
+                       i40e_memcpy(&desc_cb, desc, sizeof(struct i40e_aq_desc),
+                                   I40E_DMA_TO_DMA);
                        cb_func(hw, &desc_cb);
                }
                i40e_memset(desc, 0, sizeof(*desc), I40E_DMA_MEM);
@@ -994,11 +1032,36 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
        u16 flags;
        u16 ntu;
 
+       /* pre-clean the event info */
+       i40e_memset(&e->desc, 0, sizeof(e->desc), I40E_NONDMA_MEM);
+
        /* take the lock before we start messing with the ring */
        i40e_acquire_spinlock(&hw->aq.arq_spinlock);
 
+       if (hw->aq.arq.count == 0) {
+               i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
+                          "AQRX: Admin queue not initialized.\n");
+               ret_code = I40E_ERR_QUEUE_EMPTY;
+               goto clean_arq_element_err;
+       }
+
        /* set next_to_use to head */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#else
        ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#else
+       ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        if (ntu == ntc) {
                /* nothing to do - shouldn't need to update ring's values */
                ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
@@ -1056,12 +1119,6 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
        hw->aq.arq.next_to_clean = ntc;
        hw->aq.arq.next_to_use = ntu;
 
-clean_arq_element_out:
-       /* Set pending if needed, unlock and return */
-       if (pending != NULL)
-               *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);
-       i40e_release_spinlock(&hw->aq.arq_spinlock);
-
 #ifdef PF_DRIVER
        if (i40e_is_nvm_update_op(&e->desc)) {
                if (hw->aq.nvm_release_on_done) {
@@ -1084,6 +1141,13 @@ clean_arq_element_out:
        }
 
 #endif
+clean_arq_element_out:
+       /* Set pending if needed, unlock and return */
+       if (pending != NULL)
+               *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);
+clean_arq_element_err:
+       i40e_release_spinlock(&hw->aq.arq_spinlock);
+
        return ret_code;
 }
 
@@ -1093,9 +1157,6 @@ void i40e_resume_aq(struct i40e_hw *hw)
        hw->aq.asq.next_to_use = 0;
        hw->aq.asq.next_to_clean = 0;
 
-#if (I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK)
-#error I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK
-#endif
        i40e_config_asq_regs(hw);
 
        hw->aq.arq.next_to_use = 0;
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