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e1000: support Rx interrupt setup
[dpdk.git] / drivers / net / i40e / base / i40e_adminq.c
diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c
index 175daab..998582c 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq.c
+++ b/drivers/net/i40e/base/i40e_adminq.c
@@ -69,6 +69,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
                hw->aq.arq.len  = I40E_VF_ARQLEN1;
                hw->aq.arq.bal  = I40E_VF_ARQBAL1;
                hw->aq.arq.bah  = I40E_VF_ARQBAH1;
+#ifdef PF_DRIVER
        } else {
                hw->aq.asq.tail = I40E_PF_ATQT;
                hw->aq.asq.head = I40E_PF_ATQH;
@@ -80,6 +81,7 @@ STATIC void i40e_adminq_init_regs(struct i40e_hw *hw)
                hw->aq.arq.len  = I40E_PF_ARQLEN;
                hw->aq.arq.bal  = I40E_PF_ARQBAL;
                hw->aq.arq.bah  = I40E_PF_ARQBAH;
+#endif
        }
 }
 
@@ -316,8 +318,26 @@ STATIC enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)
        wr32(hw, hw->aq.asq.tail, 0);
 
        /* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                         I40E_PF_ATQLEN_ATQENABLE_MASK));
+#else
        wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
                                  I40E_PF_ATQLEN_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                         I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#else
+       wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
+                                 I40E_VF_ATQLEN1_ATQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
        wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
 
@@ -345,8 +365,26 @@ STATIC enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)
        wr32(hw, hw->aq.arq.tail, 0);
 
        /* set starting point */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                         I40E_PF_ARQLEN_ARQENABLE_MASK));
+#else
        wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
                                  I40E_PF_ARQLEN_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                         I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#else
+       wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
+                                 I40E_VF_ARQLEN1_ARQENABLE_MASK));
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));
        wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));
 
@@ -563,6 +601,7 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
        enum i40e_status_code ret_code;
 #ifdef PF_DRIVER
        u16 eetrack_lo, eetrack_hi;
+       u16 cfg_ptr, oem_hi, oem_lo;
        int retry = 0;
 #endif
        /* verify input for valid configuration */
@@ -627,6 +666,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
        i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo);
        i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi);
        hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo;
+       i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr);
+       i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF),
+                          &oem_hi);
+       i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)),
+                          &oem_lo);
+       hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;
 
        if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
                ret_code = I40E_ERR_FIRMWARE_API_VERSION;
@@ -680,6 +725,9 @@ enum i40e_status_code i40e_shutdown_adminq(struct i40e_hw *hw)
        i40e_destroy_spinlock(&hw->aq.asq_spinlock);
        i40e_destroy_spinlock(&hw->aq.arq_spinlock);
 
+       if (hw->nvm_buff.va)
+               i40e_free_virt_mem(hw, &hw->nvm_buff);
+
        return ret_code;
 }
 
@@ -699,16 +747,16 @@ u16 i40e_clean_asq(struct i40e_hw *hw)
 
        desc = I40E_ADMINQ_DESC(*asq, ntc);
        details = I40E_ADMINQ_DETAILS(*asq, ntc);
+
        while (rd32(hw, hw->aq.asq.head) != ntc) {
                i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
-                          "%s: ntc %d head %d.\n", __FUNCTION__, ntc,
-                          rd32(hw, hw->aq.asq.head));
+                          "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
 
                if (details->callback) {
                        I40E_ADMINQ_CALLBACK cb_func =
                                        (I40E_ADMINQ_CALLBACK)details->callback;
-                       i40e_memcpy(&desc_cb, desc,
-                                   sizeof(struct i40e_aq_desc), I40E_DMA_TO_DMA);
+                       i40e_memcpy(&desc_cb, desc, sizeof(struct i40e_aq_desc),
+                                   I40E_DMA_TO_DMA);
                        cb_func(hw, &desc_cb);
                }
                i40e_memset(desc, 0, sizeof(*desc), I40E_DMA_MEM);
@@ -925,6 +973,11 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw,
                   "AQTX: desc and buffer writeback:\n");
        i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size);
 
+       /* save writeback aq if requested */
+       if (details->wb_desc)
+               i40e_memcpy(details->wb_desc, desc_on_ring,
+                           sizeof(struct i40e_aq_desc), I40E_DMA_TO_NONDMA);
+
        /* update the error if time out occurred */
        if ((!cmd_completed) &&
            (!details->async && !details->postpone)) {
@@ -983,7 +1036,22 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
        i40e_acquire_spinlock(&hw->aq.arq_spinlock);
 
        /* set next_to_use to head */
+#ifdef PF_DRIVER
+#ifdef INTEGRATED_VF
+       if (!i40e_is_vf(hw))
+               ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#else
        ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* PF_DRIVER */
+#ifdef VF_DRIVER
+#ifdef INTEGRATED_VF
+       if (i40e_is_vf(hw))
+               ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#else
+       ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK);
+#endif /* INTEGRATED_VF */
+#endif /* VF_DRIVER */
        if (ntu == ntc) {
                /* nothing to do - shouldn't need to update ring's values */
                ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;
@@ -1053,6 +1121,19 @@ clean_arq_element_out:
                        i40e_release_nvm(hw);
                        hw->aq.nvm_release_on_done = false;
                }
+
+               switch (hw->nvmupd_state) {
+               case I40E_NVMUPD_STATE_INIT_WAIT:
+                       hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
+                       break;
+
+               case I40E_NVMUPD_STATE_WRITE_WAIT:
+                       hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
+                       break;
+
+               default:
+                       break;
+               }
        }
 
 #endif
@@ -1065,9 +1146,6 @@ void i40e_resume_aq(struct i40e_hw *hw)
        hw->aq.asq.next_to_use = 0;
        hw->aq.asq.next_to_clean = 0;
 
-#if (I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK)
-#error I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK
-#endif
        i40e_config_asq_regs(hw);
 
        hw->aq.arq.next_to_use = 0;
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