e1000: support Rx interrupt setup

[dpdk.git] / drivers / net / i40e / base / i40e_adminq_cmd.h

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index e80b723..1874653 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -265,6 +265,20 @@ enum i40e_admin_queue_opc {
        /* Tunnel commands */
        i40e_aqc_opc_add_udp_tunnel     = 0x0B00,
        i40e_aqc_opc_del_udp_tunnel     = 0x0B01,
+#ifdef X722_SUPPORT
+       i40e_aqc_opc_set_rss_key        = 0x0B02,
+       i40e_aqc_opc_set_rss_lut        = 0x0B03,
+       i40e_aqc_opc_get_rss_key        = 0x0B04,
+       i40e_aqc_opc_get_rss_lut        = 0x0B05,
+
+       /* WoL commands */
+       i40e_aqc_opc_set_wol_filter = 0x0120,
+       i40e_aqc_opc_get_wake_reason = 0x0121,
+#endif
+
+       /* Proxy commands */
+       i40e_aqc_opc_set_proxy_config   = 0x0104,
+       i40e_aqc_opc_set_ns_proxy_table_entry   = 0x0105,
 
        /* Async Events */
        i40e_aqc_opc_event_lan_overflow         = 0x1001,
@@ -831,6 +845,10 @@ struct i40e_aqc_vsi_properties_data {
        u8      queueing_opt_flags;
 #define I40E_AQ_VSI_QUE_OPT_TCP_ENA    0x10
 #define I40E_AQ_VSI_QUE_OPT_FCOE_ENA   0x20
+#ifdef X722_SUPPORT
+#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00
+#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI        0x40
+#endif
        u8      queueing_opt_reserved[3];
        /* scheduler section */
        u8      up_enable_bits;
@@ -2082,6 +2100,7 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start);
 #define I40E_AQC_CEE_APP_ISCSI_MASK    (0x7 << I40E_AQC_CEE_APP_ISCSI_SHIFT)
 #define I40E_AQC_CEE_APP_FIP_SHIFT     0x8
 #define I40E_AQC_CEE_APP_FIP_MASK      (0x7 << I40E_AQC_CEE_APP_FIP_SHIFT)
+
 #define I40E_AQC_CEE_PG_STATUS_SHIFT   0x0
 #define I40E_AQC_CEE_PG_STATUS_MASK    (0x7 << I40E_AQC_CEE_PG_STATUS_SHIFT)
 #define I40E_AQC_CEE_PFC_STATUS_SHIFT  0x3
@@ -2095,6 +2114,14 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start);
 #define I40E_AQC_CEE_FIP_STATUS_SHIFT  0x10
 #define I40E_AQC_CEE_FIP_STATUS_MASK   (0x7 << I40E_AQC_CEE_FIP_STATUS_SHIFT)
 
+/* struct i40e_aqc_get_cee_dcb_cfg_v1_resp was originally defined with
+ * word boundary layout issues, which the Linux compilers silently deal
+ * with by adding padding, making the actual struct larger than designed.
+ * However, the FW compiler for the NIC is less lenient and complains
+ * about the struct.  Hence, the struct defined here has an extra byte in
+ * fields reserved3 and reserved4 to directly acknowledge that padding,
+ * and the new length is used in the length check macro.
+ */
 struct i40e_aqc_get_cee_dcb_cfg_v1_resp {
        u8      reserved1;
        u8      oper_num_tc;
@@ -2102,9 +2129,9 @@ struct i40e_aqc_get_cee_dcb_cfg_v1_resp {
        u8      reserved2;
        u8      oper_tc_bw[8];
        u8      oper_pfc_en;
-       u8      reserved3;
+       u8      reserved3[2];
        __le16  oper_app_prio;
-       u8      reserved4;
+       u8      reserved4[2];
        __le16  tlv_status;
 };
 
@@ -2199,6 +2226,48 @@ struct i40e_aqc_del_udp_tunnel_completion {
 };
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
+#ifdef X722_SUPPORT
+
+struct i40e_aqc_get_set_rss_key {
+#define I40E_AQC_SET_RSS_KEY_VSI_VALID         (0x1 << 15)
+#define I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT      0
+#define I40E_AQC_SET_RSS_KEY_VSI_ID_MASK       (0x3FF << \
+                                       I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT)
+       __le16  vsi_id;
+       u8      reserved[6];
+       __le32  addr_high;
+       __le32  addr_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key);
+
+struct i40e_aqc_get_set_rss_key_data {
+       u8 standard_rss_key[0x28];
+       u8 extended_hash_key[0xc];
+};
+
+I40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data);
+
+struct  i40e_aqc_get_set_rss_lut {
+#define I40E_AQC_SET_RSS_LUT_VSI_VALID         (0x1 << 15)
+#define I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT      0
+#define I40E_AQC_SET_RSS_LUT_VSI_ID_MASK       (0x3FF << \
+                                       I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT)
+       __le16  vsi_id;
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT  0
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK   (0x1 << \
+                                       I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT)
+
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI    0
+#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF     1
+       __le16  flags;
+       u8      reserved[4];
+       __le32  addr_high;
+       __le32  addr_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
+#endif
 
 /* tunnel key structure 0x0B10 */
 
@@ -2357,4 +2426,84 @@ struct i40e_aqc_debug_modify_internals {
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_debug_modify_internals);
 
+#ifdef X722_SUPPORT
+struct i40e_aqc_set_proxy_config {
+       u8 reserved_1[4];
+       u8 reserved_2[4];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_proxy_config);
+
+struct i40e_aqc_set_proxy_config_resp {
+       u8 reserved[8];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_proxy_config_resp);
+
+struct i40e_aqc_set_ns_proxy_table_entry {
+       u8 reserved_1[4];
+       u8 reserved_2[4];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_ns_proxy_table_entry);
+
+struct i40e_aqc_set_ns_proxy_table_entry_resp {
+       u8 reserved_1[4];
+       u8 reserved_2[4];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_ns_proxy_table_entry_resp);
+
+struct i40e_aqc_set_wol_filter {
+       __le16 filter_index;
+#define I40E_AQC_MAX_NUM_WOL_FILTERS   8
+       __le16 cmd_flags;
+#define I40E_AQC_SET_WOL_FILTER                                0x8000
+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL             0x4000
+       __le16 valid_flags;
+#define I40E_AQC_SET_WOL_FILTER_ACTION_VALID           0x8000
+#define I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID    0x4000
+       u8 reserved[2];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_wol_filter);
+
+struct i40e_aqc_set_wol_filter_resp {
+       u8 reserved[8];
+       __le32  address_high;
+       __le32  address_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_wol_filter_resp);
+
+struct i40e_aqc_get_wol_wake_reason {
+       u8 reserved[16];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wol_wake_reason);
+
+struct i40e_aqc_get_wake_reason_completion {
+       u8 reserved_1[2];
+       __le16 wake_reason;
+       u8 reserved_2[12];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);
+
+struct i40e_aqc_set_wol_filter_data {
+       u8 filter[128];
+       u8 mask[16];
+};
+
 #endif
+#endif /* _I40E_ADMINQ_CMD_H_ */