net/i40e/base: implement clear all WoL filters

[dpdk.git] / drivers / net / i40e / base / i40e_adminq_cmd.h

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index 271f9b5..19af8b5 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -156,6 +156,7 @@ enum i40e_admin_queue_opc {
        /* WoL commands */
        i40e_aqc_opc_set_wol_filter     = 0x0120,
        i40e_aqc_opc_get_wake_reason    = 0x0121,
+       i40e_aqc_opc_clear_all_wol_filters = 0x025E,
 
 #endif
        /* internal switch commands */
@@ -224,6 +225,9 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_suspend_port_tx                            = 0x041B,
        i40e_aqc_opc_resume_port_tx                             = 0x041C,
        i40e_aqc_opc_configure_partition_bw                     = 0x041D,
+       /* hmc */
+       i40e_aqc_opc_query_hmc_resource_profile = 0x0500,
+       i40e_aqc_opc_set_hmc_resource_profile   = 0x0501,
 
        /* phy commands*/
        i40e_aqc_opc_get_phy_abilities          = 0x0600,
@@ -472,13 +476,15 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_cppm_configuration);
 /* Set ARP Proxy command / response (indirect 0x0104) */
 struct i40e_aqc_arp_proxy_data {
        __le16  command_flags;
-#define I40E_AQ_ARP_INIT_IPV4  0x0008
-#define I40E_AQ_ARP_UNSUP_CTL  0x0010
-#define I40E_AQ_ARP_ENA                0x0020
-#define I40E_AQ_ARP_ADD_IPV4   0x0040
-#define I40E_AQ_ARP_DEL_IPV4   0x0080
+#define I40E_AQ_ARP_INIT_IPV4  0x0800
+#define I40E_AQ_ARP_UNSUP_CTL  0x1000
+#define I40E_AQ_ARP_ENA                0x2000
+#define I40E_AQ_ARP_ADD_IPV4   0x4000
+#define I40E_AQ_ARP_DEL_IPV4   0x8000
        __le16  table_id;
-       __le32  pfpm_proxyfc;
+       __le32  enabled_offloads;
+#define I40E_AQ_ARP_DIRECTED_OFFLOAD_ENABLE    0x00000020
+#define I40E_AQ_ARP_OFFLOAD_ENABLE             0x00000800
        __le32  ip_addr;
        u8      mac_addr[6];
        u8      reserved[2];
@@ -493,17 +499,19 @@ struct i40e_aqc_ns_proxy_data {
        __le16  table_idx_ipv6_0;
        __le16  table_idx_ipv6_1;
        __le16  control;
-#define I40E_AQ_NS_PROXY_ADD_0         0x0100
-#define I40E_AQ_NS_PROXY_DEL_0         0x0200
-#define I40E_AQ_NS_PROXY_ADD_1         0x0400
-#define I40E_AQ_NS_PROXY_DEL_1         0x0800
-#define I40E_AQ_NS_PROXY_ADD_IPV6_0    0x1000
-#define I40E_AQ_NS_PROXY_DEL_IPV6_0    0x2000
-#define I40E_AQ_NS_PROXY_ADD_IPV6_1    0x4000
-#define I40E_AQ_NS_PROXY_DEL_IPV6_1    0x8000
-#define I40E_AQ_NS_PROXY_COMMAND_SEQ   0x0001
-#define I40E_AQ_NS_PROXY_INIT_IPV6_TBL 0x0002
-#define I40E_AQ_NS_PROXY_INIT_MAC_TBL  0x0004
+#define I40E_AQ_NS_PROXY_ADD_0         0x0001
+#define I40E_AQ_NS_PROXY_DEL_0         0x0002
+#define I40E_AQ_NS_PROXY_ADD_1         0x0004
+#define I40E_AQ_NS_PROXY_DEL_1         0x0008
+#define I40E_AQ_NS_PROXY_ADD_IPV6_0    0x0010
+#define I40E_AQ_NS_PROXY_DEL_IPV6_0    0x0020
+#define I40E_AQ_NS_PROXY_ADD_IPV6_1    0x0040
+#define I40E_AQ_NS_PROXY_DEL_IPV6_1    0x0080
+#define I40E_AQ_NS_PROXY_COMMAND_SEQ   0x0100
+#define I40E_AQ_NS_PROXY_INIT_IPV6_TBL 0x0200
+#define I40E_AQ_NS_PROXY_INIT_MAC_TBL  0x0400
+#define I40E_AQ_NS_PROXY_OFFLOAD_ENABLE        0x0800
+#define I40E_AQ_NS_PROXY_DIRECTED_OFFLOAD_ENABLE       0x1000
        u8      mac_addr_0[6];
        u8      mac_addr_1[6];
        u8      local_mac_addr[6];
@@ -553,6 +561,7 @@ I40E_CHECK_STRUCT_LEN(24, i40e_aqc_mac_address_read_data);
 /* Manage MAC Address Write Command (0x0108) */
 struct i40e_aqc_mac_address_write {
        __le16  command_flags;
+#define I40E_AQC_MC_MAG_EN             0x0100
 #define I40E_AQC_WRITE_TYPE_LAA_ONLY   0x0000
 #define I40E_AQC_WRITE_TYPE_LAA_WOL    0x4000
 #define I40E_AQC_WRITE_TYPE_PORT       0x8000
@@ -1663,6 +1672,24 @@ struct i40e_aqc_configure_partition_bw_data {
 
 I40E_CHECK_STRUCT_LEN(0x22, i40e_aqc_configure_partition_bw_data);
 
+/* Get and set the active HMC resource profile and status.
+ * (direct 0x0500) and (direct 0x0501)
+ */
+struct i40e_aq_get_set_hmc_resource_profile {
+       u8      pm_profile;
+       u8      pe_vf_enabled;
+       u8      reserved[14];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aq_get_set_hmc_resource_profile);
+
+enum i40e_aq_hmc_profile {
+       /* I40E_HMC_PROFILE_NO_CHANGE   = 0, reserved */
+       I40E_HMC_PROFILE_DEFAULT        = 1,
+       I40E_HMC_PROFILE_FAVOR_VF       = 2,
+       I40E_HMC_PROFILE_EQUAL          = 3,
+};
+
 /* Get PHY Abilities (indirect 0x0600) uses the generic indirect struct */
 
 /* set in param0 for get phy abilities to report qualified modules */
@@ -1742,6 +1769,8 @@ struct i40e_aq_get_phy_abilities_resp {
 #define I40E_AQ_PHY_LINK_ENABLED       0x08
 #define I40E_AQ_PHY_AN_ENABLED         0x10
 #define I40E_AQ_PHY_FLAG_MODULE_QUAL   0x20
+#define I40E_AQ_PHY_FEC_ABILITY_KR     0x40
+#define I40E_AQ_PHY_FEC_ABILITY_RS     0x80
        __le16  eee_capability;
 #define I40E_AQ_EEE_100BASE_TX         0x0002
 #define I40E_AQ_EEE_1000BASE_T         0x0004
@@ -1757,7 +1786,16 @@ struct i40e_aq_get_phy_abilities_resp {
 #define I40E_AQ_PHY_TYPE_EXT_25G_CR    0X02
 #define I40E_AQ_PHY_TYPE_EXT_25G_SR    0x04
 #define I40E_AQ_PHY_TYPE_EXT_25G_LR    0x08
-       u8      mod_type_ext;
+       u8      fec_cfg_curr_mod_ext_info;
+#define I40E_AQ_ENABLE_FEC_KR          0x01
+#define I40E_AQ_ENABLE_FEC_RS          0x02
+#define I40E_AQ_REQUEST_FEC_KR         0x04
+#define I40E_AQ_REQUEST_FEC_RS         0x08
+#define I40E_AQ_ENABLE_FEC_AUTO                0x10
+#define I40E_AQ_FEC
+#define I40E_AQ_MODULE_TYPE_EXT_MASK   0xE0
+#define I40E_AQ_MODULE_TYPE_EXT_SHIFT  5
+
        u8      ext_comp_code;
        u8      phy_id[4];
        u8      module_type[3];
@@ -1785,7 +1823,15 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
 #define I40E_AQ_PHY_TYPE_EXT_25G_CR    0X02
 #define I40E_AQ_PHY_TYPE_EXT_25G_SR    0x04
 #define I40E_AQ_PHY_TYPE_EXT_25G_LR    0x08
-       u8      reserved[2];
+       u8      fec_config;
+#define I40E_AQ_SET_FEC_ABILITY_KR     BIT(0)
+#define I40E_AQ_SET_FEC_ABILITY_RS     BIT(1)
+#define I40E_AQ_SET_FEC_REQUEST_KR     BIT(2)
+#define I40E_AQ_SET_FEC_REQUEST_RS     BIT(3)
+#define I40E_AQ_SET_FEC_AUTO           BIT(4)
+#define I40E_AQ_PHY_FEC_CONFIG_SHIFT   0x0
+#define I40E_AQ_PHY_FEC_CONFIG_MASK    (0x1F << I40E_AQ_PHY_FEC_CONFIG_SHIFT)
+       u8      reserved;
 };
 
 I40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);
@@ -1875,6 +1921,8 @@ struct i40e_aqc_get_link_status {
        u8      loopback; /* use defines from i40e_aqc_set_lb_mode */
        __le16  max_frame_size;
        u8      config;
+#define I40E_AQ_CONFIG_FEC_KR_ENA      0x01
+#define I40E_AQ_CONFIG_FEC_RS_ENA      0x02
 #define I40E_AQ_CONFIG_CRC_ENA         0x04
 #define I40E_AQ_CONFIG_PACING_MASK     0x78
        u8      power_desc;