net/i40e/base: define bit for HW ATR evict control

[dpdk.git] / drivers / net / i40e / base / i40e_adminq_cmd.h

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index d4d2a7a..ff13fbf 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -139,12 +139,10 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_list_func_capabilities     = 0x000A,
        i40e_aqc_opc_list_dev_capabilities      = 0x000B,
 
-#ifdef X722_SUPPORT
        /* Proxy commands */
        i40e_aqc_opc_set_proxy_config           = 0x0104,
        i40e_aqc_opc_set_ns_proxy_table_entry   = 0x0105,
 
-#endif
        /* LAA */
        i40e_aqc_opc_mac_address_read   = 0x0107,
        i40e_aqc_opc_mac_address_write  = 0x0108,
@@ -152,13 +150,11 @@ enum i40e_admin_queue_opc {
        /* PXE */
        i40e_aqc_opc_clear_pxe_mode     = 0x0110,
 
-#ifdef X722_SUPPORT
        /* WoL commands */
        i40e_aqc_opc_set_wol_filter     = 0x0120,
        i40e_aqc_opc_get_wake_reason    = 0x0121,
        i40e_aqc_opc_clear_all_wol_filters = 0x025E,
 
-#endif
        /* internal switch commands */
        i40e_aqc_opc_get_switch_config          = 0x0200,
        i40e_aqc_opc_add_statistics             = 0x0201,
@@ -283,12 +279,10 @@ enum i40e_admin_queue_opc {
        /* Tunnel commands */
        i40e_aqc_opc_add_udp_tunnel     = 0x0B00,
        i40e_aqc_opc_del_udp_tunnel     = 0x0B01,
-#ifdef X722_SUPPORT
        i40e_aqc_opc_set_rss_key        = 0x0B02,
        i40e_aqc_opc_set_rss_lut        = 0x0B03,
        i40e_aqc_opc_get_rss_key        = 0x0B04,
        i40e_aqc_opc_get_rss_lut        = 0x0B05,
-#endif
 
        /* Async Events */
        i40e_aqc_opc_event_lan_overflow         = 0x1001,
@@ -587,7 +581,6 @@ struct i40e_aqc_clear_pxe {
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_clear_pxe);
 
-#ifdef X722_SUPPORT
 /* Set WoL Filter (0x0120) */
 
 struct i40e_aqc_set_wol_filter {
@@ -639,7 +632,6 @@ struct i40e_aqc_get_wake_reason_completion {
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);
 
-#endif /* X722_SUPPORT */
 /* Switch configuration commands (0x02xx) */
 
 /* Used by many indirect commands that only pass an seid and a buffer in the
@@ -778,6 +770,7 @@ struct i40e_aqc_set_switch_config {
 /* flags used for both fields below */
 #define I40E_AQ_SET_SWITCH_CFG_PROMISC         0x0001
 #define I40E_AQ_SET_SWITCH_CFG_L2_FILTER       0x0002
+#define I40E_AQ_SET_SWITCH_CFG_HW_ATR_EVICT    0x0004
        __le16  valid_flags;
        u8      reserved[12];
 };
@@ -944,16 +937,12 @@ struct i40e_aqc_vsi_properties_data {
                                         I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT)
        /* queueing option section */
        u8      queueing_opt_flags;
-#ifdef X722_SUPPORT
 #define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA  0x04
 #define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA    0x08
-#endif
 #define I40E_AQ_VSI_QUE_OPT_TCP_ENA    0x10
 #define I40E_AQ_VSI_QUE_OPT_FCOE_ENA   0x20
-#ifdef X722_SUPPORT
 #define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00
 #define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI        0x40
-#endif
        u8      queueing_opt_reserved[3];
        /* scheduler section */
        u8      up_enable_bits;
@@ -1785,8 +1774,8 @@ struct i40e_aq_get_phy_abilities_resp {
        u8      d3_lpan;
 #define I40E_AQ_SET_PHY_D3_LPAN_ENA    0x01
        u8      phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR    0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR    0X02
+#define I40E_AQ_PHY_TYPE_EXT_25G_KR    0x01
+#define I40E_AQ_PHY_TYPE_EXT_25G_CR    0x02
 #define I40E_AQ_PHY_TYPE_EXT_25G_SR    0x04
 #define I40E_AQ_PHY_TYPE_EXT_25G_LR    0x08
        u8      fec_cfg_curr_mod_ext_info;
@@ -1822,10 +1811,6 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */
        __le32  eeer;
        u8      low_power_ctrl;
        u8      phy_type_ext;
-#define I40E_AQ_PHY_TYPE_EXT_25G_KR    0X01
-#define I40E_AQ_PHY_TYPE_EXT_25G_CR    0X02
-#define I40E_AQ_PHY_TYPE_EXT_25G_SR    0x04
-#define I40E_AQ_PHY_TYPE_EXT_25G_LR    0x08
        u8      fec_config;
 #define I40E_AQ_SET_FEC_ABILITY_KR     BIT(0)
 #define I40E_AQ_SET_FEC_ABILITY_RS     BIT(1)
@@ -2431,7 +2416,6 @@ struct i40e_aqc_del_udp_tunnel_completion {
 };
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion);
-#ifdef X722_SUPPORT
 
 struct i40e_aqc_get_set_rss_key {
 #define I40E_AQC_SET_RSS_KEY_VSI_VALID         (0x1 << 15)
@@ -2472,7 +2456,6 @@ struct  i40e_aqc_get_set_rss_lut {
 };
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut);
-#endif
 
 /* tunnel key structure 0x0B10 */