fix typos using codespell utility

[dpdk.git] / drivers / net / i40e / i40e_ethdev.c

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 748e7ae..4ee1113 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -74,7 +74,7 @@
 /* Maximun number of capability elements */
 #define I40E_MAX_CAP_ELE_NUM       128
 
-/* Wait count and inteval */
+/* Wait count and interval */
 #define I40E_CHK_Q_ENA_COUNT       1000
 #define I40E_CHK_Q_ENA_INTERVAL_US 1000
 
@@ -2329,6 +2329,10 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
        i40e_stat_update_48(hw, I40E_GLV_BPRCH(idx), I40E_GLV_BPRCL(idx),
                            vsi->offset_loaded, &oes->rx_broadcast,
                            &nes->rx_broadcast);
+       /* exclude CRC bytes */
+       nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
+               nes->rx_broadcast) * ETHER_CRC_LEN;
+
        i40e_stat_update_32(hw, I40E_GLV_RDPC(idx), vsi->offset_loaded,
                            &oes->rx_discards, &nes->rx_discards);
        /* GLV_REPC not supported */
@@ -2348,6 +2352,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
        i40e_stat_update_48(hw, I40E_GLV_BPTCH(idx), I40E_GLV_BPTCL(idx),
                            vsi->offset_loaded,  &oes->tx_broadcast,
                            &nes->tx_broadcast);
+       /* exclude CRC bytes */
+       nes->tx_bytes -= (nes->tx_unicast + nes->tx_multicast +
+               nes->tx_broadcast) * ETHER_CRC_LEN;
        /* GLV_TDPC not supported */
        i40e_stat_update_32(hw, I40E_GLV_TEPC(idx), vsi->offset_loaded,
                            &oes->tx_errors, &nes->tx_errors);
@@ -5727,16 +5734,16 @@ i40e_dev_handle_vfr_event(struct rte_eth_dev *dev)
                index = abs_vf_id / I40E_UINT32_BIT_SIZE;
                offset = abs_vf_id % I40E_UINT32_BIT_SIZE;
                val = I40E_READ_REG(hw, I40E_GLGEN_VFLRSTAT(index));
-               /* VFR event occured */
+               /* VFR event occurred */
                if (val & (0x1 << offset)) {
                        int ret;
 
                        /* Clear the event first */
                        I40E_WRITE_REG(hw, I40E_GLGEN_VFLRSTAT(index),
                                                        (0x1 << offset));
-                       PMD_DRV_LOG(INFO, "VF %u reset occured", abs_vf_id);
+                       PMD_DRV_LOG(INFO, "VF %u reset occurred", abs_vf_id);
                        /**
-                        * Only notify a VF reset event occured,
+                        * Only notify a VF reset event occurred,
                         * don't trigger another SW reset
                         */
                        ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
@@ -7453,7 +7460,7 @@ i40e_pf_config_rss(struct i40e_pf *pf)
 
        /*
         * If both VMDQ and RSS enabled, not all of PF queues are configured.
-        * It's necessary to calulate the actual PF queues that are configured.
+        * It's necessary to calculate the actual PF queues that are configured.
         */
        if (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG)
                num = i40e_pf_calc_configured_queues_num(pf);
@@ -8129,7 +8136,7 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
 /**
  * Validate if the input set is allowed for a specific PCTYPE
  */
-static int
+int
 i40e_validate_input_set(enum i40e_filter_pctype pctype,
                enum rte_filter_type filter, uint64_t inset)
 {
@@ -8304,7 +8311,7 @@ i40e_parse_input_set(uint64_t *inset,
  * Translate the input set from bit masks to register aware bit masks
  * and vice versa
  */
-static uint64_t
+uint64_t
 i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
        uint64_t val = 0;
@@ -8389,7 +8396,7 @@ i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
        return val;
 }
 
-static int
+int
 i40e_generate_inset_mask_reg(uint64_t inset, uint32_t *mask, uint8_t nb_elem)
 {
        uint8_t i, idx = 0;
@@ -8437,7 +8444,7 @@ i40e_generate_inset_mask_reg(uint64_t inset, uint32_t *mask, uint8_t nb_elem)
        return idx;
 }
 
-static void
+void
 i40e_check_write_reg(struct i40e_hw *hw, uint32_t addr, uint32_t val)
 {
        uint32_t reg = i40e_read_rx_ctl(hw, addr);
@@ -10731,8 +10738,7 @@ i40e_filter_restore(struct i40e_pf *pf)
 static bool
 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
 {
-       if (strcmp(dev->data->drv_name,
-                  drv->driver.name))
+       if (strcmp(dev->device->driver->name, drv->driver.name))
                return false;
 
        return true;