vhost: use last available index for ring reservation

[dpdk.git] / drivers / net / i40e / i40e_ethdev.c

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 66be9f8..5af0e43 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -702,8 +702,8 @@ rte_i40e_dev_atomic_write_link_status(struct rte_eth_dev *dev,
        return 0;
 }
 
-DRIVER_REGISTER_PCI(net_i40e, rte_i40e_pmd.pci_drv);
-DRIVER_REGISTER_PCI_TABLE(net_i40e, pci_id_i40e_map);
+RTE_PMD_REGISTER_PCI(net_i40e, rte_i40e_pmd.pci_drv);
+RTE_PMD_REGISTER_PCI_TABLE(net_i40e, pci_id_i40e_map);
 
 #ifndef I40E_GLQF_ORT
 #define I40E_GLQF_ORT(_i)    (0x00268900 + ((_i) * 4))
@@ -1569,6 +1569,8 @@ i40e_parse_link_speeds(uint16_t link_speeds)
 
        if (link_speeds & ETH_LINK_SPEED_40G)
                link_speed |= I40E_LINK_SPEED_40GB;
+       if (link_speeds & ETH_LINK_SPEED_25G)
+               link_speed |= I40E_LINK_SPEED_25GB;
        if (link_speeds & ETH_LINK_SPEED_20G)
                link_speed |= I40E_LINK_SPEED_20GB;
        if (link_speeds & ETH_LINK_SPEED_10G)
@@ -1594,6 +1596,7 @@ i40e_phy_conf_link(struct i40e_hw *hw,
                        I40E_AQ_PHY_FLAG_PAUSE_RX |
                        I40E_AQ_PHY_FLAG_LOW_POWER;
        const uint8_t advt = I40E_LINK_SPEED_40GB |
+                       I40E_LINK_SPEED_25GB |
                        I40E_LINK_SPEED_10GB |
                        I40E_LINK_SPEED_1GB |
                        I40E_LINK_SPEED_100MB;
@@ -1646,7 +1649,8 @@ i40e_apply_link_speed(struct rte_eth_dev *dev)
        struct rte_eth_conf *conf = &dev->data->dev_conf;
 
        speed = i40e_parse_link_speeds(conf->link_speeds);
-       abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
+       if (!I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types))
+               abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
        if (!(conf->link_speeds & ETH_LINK_SPEED_FIXED))
                abilities |= I40E_AQ_PHY_AN_ENABLED;
        abilities |= I40E_AQ_PHY_LINK_ENABLED;
@@ -1748,7 +1752,8 @@ i40e_dev_start(struct rte_eth_dev *dev)
        /* Apply link configure */
        if (dev->data->dev_conf.link_speeds & ~(ETH_LINK_SPEED_100M |
                                ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
-                               ETH_LINK_SPEED_20G | ETH_LINK_SPEED_40G)) {
+                               ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G |
+                               ETH_LINK_SPEED_40G)) {
                PMD_DRV_LOG(ERR, "Invalid link setting");
                goto err_up;
        }
@@ -1968,9 +1973,11 @@ static int
 i40e_dev_set_link_down(struct rte_eth_dev *dev)
 {
        uint8_t speed = I40E_LINK_SPEED_UNKNOWN;
-       uint8_t abilities = I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
+       uint8_t abilities = 0;
        struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
+       if (!I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types))
+               abilities = I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
        return i40e_phy_conf_link(hw, abilities, speed);
 }
 
@@ -2028,6 +2035,9 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
        case I40E_LINK_SPEED_20GB:
                link.link_speed = ETH_SPEED_NUM_20G;
                break;
+       case I40E_LINK_SPEED_25GB:
+               link.link_speed = ETH_SPEED_NUM_25G;
+               break;
        case I40E_LINK_SPEED_40GB:
                link.link_speed = ETH_SPEED_NUM_40G;
                break;
@@ -2577,7 +2587,11 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
                DEV_TX_OFFLOAD_TCP_CKSUM |
                DEV_TX_OFFLOAD_SCTP_CKSUM |
                DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-               DEV_TX_OFFLOAD_TCP_TSO;
+               DEV_TX_OFFLOAD_TCP_TSO |
+               DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
+               DEV_TX_OFFLOAD_GRE_TNL_TSO |
+               DEV_TX_OFFLOAD_IPIP_TNL_TSO |
+               DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
        dev_info->hash_key_size = (I40E_PFQF_HKEY_MAX_INDEX + 1) *
                                                sizeof(uint32_t);
        dev_info->reta_size = pf->hash_lut_size;
@@ -2630,6 +2644,9 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
        if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types))
                /* For XL710 */
                dev_info->speed_capa = ETH_LINK_SPEED_40G;
+       else if (I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types))
+               /* For XXV710 */
+               dev_info->speed_capa = ETH_LINK_SPEED_25G;
        else
                /* For X710 */
                dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G;
@@ -4098,11 +4115,13 @@ i40e_vsi_release(struct i40e_vsi *vsi)
        void *temp;
        int ret;
        struct i40e_mac_filter *f;
-       uint16_t user_param = vsi->user_param;
+       uint16_t user_param;
 
        if (!vsi)
                return I40E_SUCCESS;
 
+       user_param = vsi->user_param;
+
        pf = I40E_VSI_TO_PF(vsi);
        hw = I40E_VSI_TO_HW(vsi);
 
@@ -5497,7 +5516,7 @@ i40e_dev_interrupt_delayed_handler(void *param)
 
        /* handle the link up interrupt in an alarm callback */
        i40e_dev_link_update(dev, 0);
-       _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
+       _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
 
        i40e_pf_enable_irq0(hw);
        rte_intr_enable(&(dev->pci_dev->intr_handle));
@@ -5581,7 +5600,7 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
                        return;
                else
                        _rte_eth_dev_callback_process(dev,
-                               RTE_ETH_EVENT_INTR_LSC);
+                               RTE_ETH_EVENT_INTR_LSC, NULL);
        }
 
 done:
@@ -8290,7 +8309,8 @@ i40e_configure_registers(struct i40e_hw *hw)
 
        for (i = 0; i < RTE_DIM(reg_table); i++) {
                if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) {
-                       if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types)) /* For XL710 */
+                       if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types) || /* For XL710 */
+                           I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types)) /* For XXV710 */
                                reg_table[i].val =
                                        I40E_GL_SWR_PM_UP_THR_SF_VALUE;
                        else /* For X710 */