ethdev: remove detachable device flag

[dpdk.git] / drivers / net / i40e / i40e_ethdev.c

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 814f458..fdc150d 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -649,7 +649,8 @@ static int eth_i40e_pci_remove(struct rte_pci_device *pci_dev)
 
 static struct rte_pci_driver rte_i40e_pmd = {
        .id_table = pci_id_i40e_map,
-       .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
+       .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
+                    RTE_PCI_DRV_IOVA_AS_VA,
        .probe = eth_i40e_pci_probe,
        .remove = eth_i40e_pci_remove,
 };
@@ -699,23 +700,22 @@ RTE_PMD_REGISTER_KMOD_DEP(net_i40e, "* igb_uio | uio_pci_generic | vfio-pci");
 static inline void i40e_GLQF_reg_init(struct i40e_hw *hw)
 {
        /*
-        * Initialize registers for flexible payload, which should be set by NVM.
-        * This should be removed from code once it is fixed in NVM.
+        * Force global configuration for flexible payload
+        * to the first 16 bytes of the corresponding L2/L3/L4 paylod.
+        * This should be removed from code once proper
+        * configuration API is added to avoid configuration conflicts
+        * between ports of the same device.
         */
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(18), 0x00000030);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(19), 0x00000030);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(26), 0x0000002B);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(30), 0x0000002B);
        I40E_WRITE_REG(hw, I40E_GLQF_ORT(33), 0x000000E0);
        I40E_WRITE_REG(hw, I40E_GLQF_ORT(34), 0x000000E3);
        I40E_WRITE_REG(hw, I40E_GLQF_ORT(35), 0x000000E6);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(20), 0x00000031);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(23), 0x00000031);
-       I40E_WRITE_REG(hw, I40E_GLQF_ORT(63), 0x0000002D);
-       I40E_WRITE_REG(hw, I40E_GLQF_PIT(16), 0x00007480);
-       I40E_WRITE_REG(hw, I40E_GLQF_PIT(17), 0x00007440);
 
-       /* Initialize registers for parsing packet type of QinQ */
+       /*
+        * Initialize registers for parsing packet type of QinQ
+        * This should be removed from code once proper
+        * configuration API is added to avoid configuration conflicts
+        * between ports of the same device.
+        */
        I40E_WRITE_REG(hw, I40E_GLQF_ORT(40), 0x00000029);
        I40E_WRITE_REG(hw, I40E_GLQF_PIT(9), 0x00009420);
 }
@@ -1100,7 +1100,6 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
        intr_handle = &pci_dev->intr_handle;
 
        rte_eth_copy_pci_info(dev, pci_dev);
-       dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
 
        pf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
        pf->adapter->eth_dev = dev;
@@ -11065,12 +11064,12 @@ i40e_update_customized_ptype(struct rte_eth_dev *dev, uint8_t *pkg,
                               struct rte_pmd_i40e_proto_info *proto)
 {
        struct rte_pmd_i40e_ptype_mapping *ptype_mapping;
-       uint8_t port_id = dev->data->port_id;
+       uint16_t port_id = dev->data->port_id;
        uint32_t ptype_num;
        struct rte_pmd_i40e_ptype_info *ptype;
        uint32_t buff_size;
        uint8_t proto_id;
-       char name[16];
+       char name[RTE_PMD_I40E_DDP_NAME_SIZE];
        uint32_t i, j, n;
        bool inner_ip;
        int ret;
@@ -11131,30 +11130,32 @@ i40e_update_customized_ptype(struct rte_eth_dev *dev, uint8_t *pkg,
                                        ptype_mapping[i].sw_ptype |=
                                                RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
                                        inner_ip = true;
-                               } else if (!strncmp(name, "IPV4", 4) &&
+                               } else if (!strncmp(name, "IPV4FRAG", 8) &&
                                           inner_ip) {
                                        ptype_mapping[i].sw_ptype |=
                                            RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
-                               } else if (!strncmp(name, "IPV6", 4) &&
-                                          !inner_ip) {
+                                       ptype_mapping[i].sw_ptype |=
+                                               RTE_PTYPE_INNER_L4_FRAG;
+                               } else if (!strncmp(name, "IPV4", 4) &&
+                                          inner_ip)
+                                       ptype_mapping[i].sw_ptype |=
+                                           RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
+                               else if (!strncmp(name, "IPV6", 4) &&
+                                        !inner_ip) {
                                        ptype_mapping[i].sw_ptype |=
                                                RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
                                        inner_ip = true;
-                               } else if (!strncmp(name, "IPV6", 4) &&
+                               } else if (!strncmp(name, "IPV6FRAG", 8) &&
                                           inner_ip) {
                                        ptype_mapping[i].sw_ptype |=
                                            RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
-                               } else if (!strncmp(name, "IPV4FRAG", 8)) {
-                                       ptype_mapping[i].sw_ptype |=
-                                           RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
                                        ptype_mapping[i].sw_ptype |=
                                                RTE_PTYPE_INNER_L4_FRAG;
-                               } else if (!strncmp(name, "IPV6FRAG", 8)) {
+                               } else if (!strncmp(name, "IPV6", 4) &&
+                                          inner_ip)
                                        ptype_mapping[i].sw_ptype |=
                                            RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
-                                       ptype_mapping[i].sw_ptype |=
-                                               RTE_PTYPE_INNER_L4_FRAG;
-                               } else if (!strncmp(name, "GTPC", 4))
+                               else if (!strncmp(name, "GTPC", 4))
                                        ptype_mapping[i].sw_ptype |=
                                                RTE_PTYPE_TUNNEL_GTPC;
                                else if (!strncmp(name, "GTPU", 4))