net/ixgbe: fix mask bits register set error for FDIR

[dpdk.git] / drivers / net / i40e / i40e_ethdev.h

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index a0569d4..11c4c76 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -86,11 +86,13 @@
 
 #define I40E_WRITE_GLB_REG(hw, reg, value)                             \
        do {                                                            \
+               uint32_t ori_val;                                       \
+               ori_val = I40E_READ_REG((hw), (reg));                   \
                I40E_PCI_REG_WRITE(I40E_PCI_REG_ADDR((hw),              \
                                                     (reg)), (value));  \
-               PMD_DRV_LOG(DEBUG, "Global register 0x%08x is modified " \
-                           "with value 0x%08x",                        \
-                           (reg), (value));                            \
+               PMD_DRV_LOG(DEBUG, "global register [0x%08x] "          \
+                           "original: 0x%08x, after: 0x%08x ",         \
+                           (reg), (ori_val), (value));                 \
        } while (0)
 
 /* index flex payload per layer */
@@ -886,7 +888,7 @@ struct i40e_rte_flow_rss_conf {
        struct rte_flow_action_rss conf; /**< RSS parameters. */
        uint16_t queue_region_conf; /**< Queue region config flag */
        uint8_t key[(I40E_VFQF_HKEY_MAX_INDEX > I40E_PFQF_HKEY_MAX_INDEX ?
-                    I40E_VFQF_HKEY_MAX_INDEX : I40E_PFQF_HKEY_MAX_INDEX) + 1 *
+                    I40E_VFQF_HKEY_MAX_INDEX : I40E_PFQF_HKEY_MAX_INDEX + 1) *
                    sizeof(uint32_t)]; /* Hash key. */
        uint16_t queue[I40E_MAX_Q_PER_TC]; /**< Queues indices to use. */
 };
@@ -964,6 +966,8 @@ struct i40e_pf {
        bool gtp_support; /* 1 - support GTP-C and GTP-U */
        /* customer customized pctype */
        struct i40e_customized_pctype customized_pctype[I40E_CUSTOMIZED_MAX];
+       /* Switch Domain Id */
+       uint16_t switch_domain_id;
 };
 
 enum pending_msg {
@@ -1069,6 +1073,20 @@ struct i40e_adapter {
        uint64_t pctypes_mask;
 };
 
+/**
+ * Strucute to store private data for each VF representor instance
+ */
+struct i40e_vf_representor {
+       uint16_t switch_domain_id;
+       /**< Virtual Function ID */
+       uint16_t vf_id;
+       /**< Virtual Function ID */
+       struct i40e_adapter *adapter;
+       /**< Private data store of assocaiated physical function */
+       struct i40e_eth_stats stats_offset;
+       /**< Zero-point of VF statistics*/
+};
+
 extern const struct rte_flow_ops i40e_flow_ops;
 
 union i40e_filter_t {
@@ -1232,6 +1250,8 @@ int i40e_action_rss_same(const struct rte_flow_action_rss *comp,
                         const struct rte_flow_action_rss *with);
 int i40e_config_rss_filter(struct i40e_pf *pf,
                struct i40e_rte_flow_rss_conf *conf, bool add);
+int i40e_vf_representor_init(struct rte_eth_dev *ethdev, void *init_params);
+int i40e_vf_representor_uninit(struct rte_eth_dev *ethdev);
 
 #define I40E_DEV_TO_PCI(eth_dev) \
        RTE_DEV_TO_PCI((eth_dev)->device)