#define _I40E_ETHDEV_H_
#include <rte_eth_ctrl.h>
+#include <rte_time.h>
#define I40E_VLAN_TAG_SIZE 4
/* Bandwidth limit information */
struct i40e_bw_info {
uint16_t bw_limit; /* BW Limit (0 = disabled) */
- uint8_t bw_max_quanta; /* Max Quanta when BW limit is enabled */
+ uint8_t bw_max; /* Max BW limit if enabled */
- /* Relative TC credits across VSIs */
+ /* Relative VSI credits within same TC with respect to other VSIs */
uint8_t bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
- /* TC BW limit credits within VSI */
- uint8_t bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
- /* TC BW limit max quanta within VSI */
- uint8_t bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
+ /* Bandwidth limit per TC */
+ uint8_t bw_ets_credits[I40E_MAX_TRAFFIC_CLASS];
+ /* Max bandwidth limit per TC */
+ uint8_t bw_ets_max[I40E_MAX_TRAFFIC_CLASS];
};
/*
struct i40e_vf vf;
};
- /* for vector PMD */
+ /* For vector PMD */
bool rx_bulk_alloc_allowed;
bool rx_vec_allowed;
bool tx_simple_allowed;
bool tx_vec_allowed;
+
+ /* For PTP */
+ struct rte_timecounter systime_tc;
+ struct rte_timecounter rx_tstamp_tc;
+ struct rte_timecounter tx_tstamp_tc;
};
int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);
interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
/* Convert to hardware count, as writing each 1 represents 2 us */
- return (interval / 2);
+ return interval / 2;
}
#define I40E_VALID_FLOW(flow_type) \