i40e: support ieee1588 functions for device time

[dpdk.git] / drivers / net / i40e / i40e_ethdev.h

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index c64f83bb7df378d7a587c570b37848cee1bf744d..be705f779087a0a662bc78ebca4c1256bed80ccf 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -35,6 +35,7 @@
 #define _I40E_ETHDEV_H_
 
 #include <rte_eth_ctrl.h>
+#include <rte_time.h>
 
 #define I40E_VLAN_TAG_SIZE        4
 
@@ -159,6 +160,14 @@ enum i40e_flxpld_layer_idx {
        (1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
        (1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
 
+#define I40E_MISC_VEC_ID                RTE_INTR_VEC_ZERO_OFFSET
+#define I40E_RX_VEC_START               RTE_INTR_VEC_RXTX_OFFSET
+
+/* Default queue interrupt throttling time in microseconds */
+#define I40E_ITR_INDEX_DEFAULT          0
+#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
+#define I40E_QUEUE_ITR_INTERVAL_MAX     8160 /* 8160 us */
+
 struct i40e_adapter;
 
 /**
@@ -256,6 +265,7 @@ struct i40e_vsi {
        uint16_t seid;           /* The seid of VSI itself */
        uint16_t uplink_seid;    /* The uplink seid of this VSI */
        uint16_t nb_qps;         /* Number of queue pairs VSI can occupy */
+       uint16_t nb_used_qps;    /* Number of queue pairs VSI uses */
        uint16_t max_macaddrs;   /* Maximum number of MAC addresses */
        uint16_t base_queue;     /* The first queue index of this VSI */
        /*
@@ -264,6 +274,7 @@ struct i40e_vsi {
         */
        uint16_t vsi_id;
        uint16_t msix_intr; /* The MSIX interrupt binds to VSI */
+       uint16_t nb_msix;   /* The max number of msix vector */
        uint8_t enabled_tc; /* The traffic class enabled */
        struct i40e_bw_info bw_info; /* VSI bandwidth information */
 };
@@ -506,11 +517,16 @@ struct i40e_adapter {
                struct i40e_vf vf;
        };
 
-       /* for vector PMD */
+       /* For vector PMD */
        bool rx_bulk_alloc_allowed;
        bool rx_vec_allowed;
        bool tx_simple_allowed;
        bool tx_vec_allowed;
+
+       /* For PTP */
+       struct rte_timecounter systime_tc;
+       struct rte_timecounter rx_tstamp_tc;
+       struct rte_timecounter tx_tstamp_tc;
 };
 
 int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);
@@ -633,6 +649,16 @@ i40e_align_floor(int n)
        return 1 << (sizeof(n) * CHAR_BIT - 1 - __builtin_clz(n));
 }
 
+static inline uint16_t
+i40e_calc_itr_interval(int16_t interval)
+{
+       if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
+               interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+
+       /* Convert to hardware count, as writing each 1 represents 2 us */
+       return (interval / 2);
+}
+
 #define I40E_VALID_FLOW(flow_type) \
        ((flow_type) == RTE_ETH_FLOW_FRAG_IPV4 || \
        (flow_type) == RTE_ETH_FLOW_NONFRAG_IPV4_TCP || \