i40e: configure input fields for RSS or flow director

[dpdk.git] / drivers / net / i40e / i40e_ethdev.h

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 062878b..c64f83b 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -107,6 +107,7 @@ enum i40e_flxpld_layer_idx {
 #define I40E_FDIR_BITMASK_NUM_WORD  2  /* max number of bitmask words */
 #define I40E_FDIR_MAX_FLEXWORD_NUM  8  /* max number of flexpayload words */
 #define I40E_FDIR_MAX_FLEX_LEN      16 /* len in bytes of flex payload */
+#define I40E_INSET_MASK_NUM_REG     2  /* number of input set mask registers */
 
 /* i40e flags */
 #define I40E_FLAG_RSS                   (1ULL << 0)
@@ -117,6 +118,7 @@ enum i40e_flxpld_layer_idx {
 #define I40E_FLAG_HEADER_SPLIT_ENABLED  (1ULL << 5)
 #define I40E_FLAG_FDIR                  (1ULL << 6)
 #define I40E_FLAG_VXLAN                 (1ULL << 7)
+#define I40E_FLAG_RSS_AQ_CAPABLE        (1ULL << 8)
 #define I40E_FLAG_ALL (I40E_FLAG_RSS | \
                       I40E_FLAG_DCB | \
                       I40E_FLAG_VMDQ | \
@@ -124,7 +126,8 @@ enum i40e_flxpld_layer_idx {
                       I40E_FLAG_HEADER_SPLIT_DISABLED | \
                       I40E_FLAG_HEADER_SPLIT_ENABLED | \
                       I40E_FLAG_FDIR | \
-                      I40E_FLAG_VXLAN)
+                      I40E_FLAG_VXLAN | \
+                      I40E_FLAG_RSS_AQ_CAPABLE)
 
 #define I40E_RSS_OFFLOAD_ALL ( \
        ETH_RSS_FRAG_IPV4 | \
@@ -400,10 +403,18 @@ struct i40e_pf {
        uint16_t vf_num;
        /* Each of below queue pairs should be power of 2 since it's the
           precondition after TC configuration applied */
+       uint16_t lan_nb_qp_max;
        uint16_t lan_nb_qps; /* The number of queue pairs of LAN */
+       uint16_t lan_qp_offset;
+       uint16_t vmdq_nb_qp_max;
        uint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */
+       uint16_t vmdq_qp_offset;
+       uint16_t vf_nb_qp_max;
        uint16_t vf_nb_qps; /* The number of queue pairs of VF */
+       uint16_t vf_qp_offset;
        uint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */
+       uint16_t fdir_qp_offset;
+
        uint16_t hash_lut_size; /* The size of hash lookup table */
        /* store VXLAN UDP ports */
        uint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
@@ -478,6 +489,7 @@ struct i40e_vf {
        struct i40e_virtchnl_vf_resource *vf_res; /* All VSIs */
        struct i40e_virtchnl_vsi_resource *vsi_res; /* LAN VSI */
        struct i40e_vsi vsi;
+       uint64_t flags;
 };
 
 /*
@@ -538,6 +550,12 @@ uint16_t i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype);
 int i40e_fdir_ctrl_func(struct rte_eth_dev *dev,
                          enum rte_filter_op filter_op,
                          void *arg);
+int i40e_select_filter_input_set(struct i40e_hw *hw,
+                                struct rte_eth_input_set_conf *conf,
+                                enum rte_filter_type filter);
+int i40e_filter_inset_select(struct i40e_hw *hw,
+                            struct rte_eth_input_set_conf *conf,
+                            enum rte_filter_type filter);
 
 void i40e_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
        struct rte_eth_rxq_info *qinfo);
@@ -581,6 +599,8 @@ i40e_get_vsi_from_adapter(struct i40e_adapter *adapter)
        (&(((struct i40e_vsi *)vsi)->adapter->hw))
 #define I40E_VSI_TO_PF(vsi) \
        (&(((struct i40e_vsi *)vsi)->adapter->pf))
+#define I40E_VSI_TO_VF(vsi) \
+       (&(((struct i40e_vsi *)vsi)->adapter->vf))
 #define I40E_VSI_TO_DEV_DATA(vsi) \
        (((struct i40e_vsi *)vsi)->adapter->pf.dev_data)
 #define I40E_VSI_TO_ETH_DEV(vsi) \