#define I40E_FLAG_FDIR (1ULL << 6)
#define I40E_FLAG_VXLAN (1ULL << 7)
#define I40E_FLAG_RSS_AQ_CAPABLE (1ULL << 8)
-#define I40E_FLAG_VF_MAC_BY_PF (1ULL << 9)
#define I40E_FLAG_ALL (I40E_FLAG_RSS | \
I40E_FLAG_DCB | \
I40E_FLAG_VMDQ | \
I40E_FLAG_HEADER_SPLIT_ENABLED | \
I40E_FLAG_FDIR | \
I40E_FLAG_VXLAN | \
- I40E_FLAG_RSS_AQ_CAPABLE | \
- I40E_FLAG_VF_MAC_BY_PF)
+ I40E_FLAG_RSS_AQ_CAPABLE)
#define I40E_RSS_OFFLOAD_ALL ( \
ETH_RSS_FRAG_IPV4 | \
#define I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_MASK \
I40E_MASK(0xFFFF, I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT)
+#define I40E_RSS_TYPE_NONE 0ULL
+#define I40E_RSS_TYPE_INVALID 1ULL
+
#define I40E_INSET_NONE 0x00000000000000000ULL
/* bit0 ~ bit 7 */
/* version of the virtchnl from VF */
struct virtchnl_version_info version;
uint32_t request_caps; /* offload caps requested from VF */
+ uint64_t num_mdd_events; /* num of mdd events detected */
/*
* Variables for store the arrival timestamp of VF messages.
uint32_t session_id; /* Session ID in big endian. */
};
+/* A structure used to define the input for l2 dst type flow */
+struct i40e_l2_flow {
+ struct rte_ether_addr dst;
+ struct rte_ether_addr src;
+ uint16_t ether_type; /**< Ether type in big endian */
+};
+
/*
* A union contains the inputs for all types of flow
* items in flows need to be in big endian
*/
union i40e_fdir_flow {
- struct rte_eth_l2_flow l2_flow;
+ struct i40e_l2_flow l2_flow;
struct rte_eth_udpv4_flow udp4_flow;
struct rte_eth_tcpv4_flow tcp4_flow;
struct rte_eth_sctpv4_flow sctp4_flow;
struct i40e_fdir_filter **hash_map;
struct rte_hash *hash_table;
+ /*
+ * Priority ordering at filter invalidation(destroying a flow) between
+ * "best effort" space and "guaranteed" space.
+ *
+ * 0 = At filter invalidation, the hardware first tries to increment the
+ * "best effort" space. The "guaranteed" space is incremented only when
+ * the global "best effort" space is at it max value or the "best effort"
+ * space of the PF is at its max value.
+ * 1 = At filter invalidation, the hardware first tries to increment its
+ * "guaranteed" space. The "best effort" space is incremented only when
+ * it is already at its max value.
+ */
+ uint32_t fdir_invalprio;
+ /* the total size of the fdir, this number is the sum of the guaranteed +
+ * shared space
+ */
+ uint32_t fdir_space_size;
+ /* the actual number of the fdir rules in hardware, initialized as 0 */
+ uint32_t fdir_actual_cnt;
+ /* the free guaranteed space of the fdir */
+ uint32_t fdir_guarantee_free_space;
+ /* the fdir total guaranteed space */
+ uint32_t fdir_guarantee_total_space;
+
/* Mark if flex pit and mask is set */
bool flex_pit_flag[I40E_MAX_FLXPLD_LAYER];
bool flex_mask_flag[I40E_FILTER_PCTYPE_MAX];
struct i40e_queue_region_info region[I40E_REGION_MAX_INDEX + 1];
};
+struct i40e_rss_pattern_info {
+ uint8_t action_flag;
+ uint64_t types;
+};
+
/* Tunnel filter number HW supports */
#define I40E_MAX_TUNNEL_FILTER_NUM 400
#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0 44
#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1 45
+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_SRC_PORT 29
+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_DST_PORT 30
#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOUDP 8
#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOGRE 9
#define I40E_AQC_ADD_CLOUD_FILTER_0X10 0x10
#define I40E_AQC_ADD_CLOUD_FILTER_0X11 0x11
#define I40E_AQC_ADD_CLOUD_FILTER_0X12 0x12
+#define I40E_AQC_ADD_L1_FILTER_0X10 0x10
#define I40E_AQC_ADD_L1_FILTER_0X11 0x11
#define I40E_AQC_ADD_L1_FILTER_0X12 0x12
#define I40E_AQC_ADD_L1_FILTER_0X13 0x13
I40E_TUNNEL_TYPE_GTPU,
I40E_TUNNEL_TYPE_ESPoUDP,
I40E_TUNNEL_TYPE_ESPoIP,
+ I40E_CLOUD_TYPE_UDP,
+ I40E_CLOUD_TYPE_TCP,
+ I40E_CLOUD_TYPE_SCTP,
I40E_TUNNEL_TYPE_MAX,
};
+/**
+ * L4 port type.
+ */
+enum i40e_l4_port_type {
+ I40E_L4_PORT_TYPE_SRC = 0,
+ I40E_L4_PORT_TYPE_DST,
+};
+
/**
* Tunneling Packet filter configuration.
*/
/** Flags from ETH_TUNNEL_FILTER_XX - see above. */
uint16_t filter_type;
enum i40e_tunnel_type tunnel_type; /**< Tunnel Type. */
+ enum i40e_l4_port_type l4_port_type; /**< L4 Port Type. */
uint32_t tenant_id; /**< Tenant ID to match. VNI, GRE key... */
uint16_t queue_id; /**< Queue assigned to if match. */
uint8_t is_to_vf; /**< 0 - to PF, 1 - to VF */
I40E_VFQF_HKEY_MAX_INDEX : I40E_PFQF_HKEY_MAX_INDEX + 1) *
sizeof(uint32_t)]; /* Hash key. */
uint16_t queue[I40E_MAX_Q_PER_TC]; /**< Queues indices to use. */
+ bool valid; /* Check if it's valid */
+};
+
+TAILQ_HEAD(i40e_rss_conf_list, i40e_rss_filter);
+
+/* RSS filter list structure */
+struct i40e_rss_filter {
+ TAILQ_ENTRY(i40e_rss_filter) next;
+ struct i40e_rte_flow_rss_conf rss_filter_info;
};
struct i40e_vf_msg_cfg {
struct i40e_fdir_info fdir; /* flow director info */
struct i40e_ethertype_rule ethertype; /* Ethertype filter rule */
struct i40e_tunnel_rule tunnel; /* Tunnel filter rule */
- struct i40e_rte_flow_rss_conf rss_info; /* rss info */
+ struct i40e_rte_flow_rss_conf rss_info; /* RSS info */
+ struct i40e_rss_conf_list rss_config_list; /* RSS rule list */
struct i40e_queue_regions queue_region; /* queue region info */
struct i40e_fc_conf fc_conf; /* Flow control conf */
struct i40e_mirror_rule_list mirror_list;
bool mpls_replace_flag; /* 1 - MPLS filter replace is done */
bool gtp_replace_flag; /* 1 - GTP-C/U filter replace is done */
bool qinq_replace_flag; /* QINQ filter replace is done */
+ /* l4 port flag */
+ bool sport_replace_flag; /* Source port replace is done */
+ bool dport_replace_flag; /* Destination port replace is done */
struct i40e_tm_conf tm_conf;
bool support_multi_driver; /* 1 - support multiple driver */
uint16_t flow_type);
uint16_t i40e_pctype_to_flowtype(const struct i40e_adapter *adapter,
enum i40e_filter_pctype pctype);
+int i40e_dev_set_gre_key_len(struct i40e_hw *hw, uint8_t len);
+void i40e_fdir_info_get(struct rte_eth_dev *dev,
+ struct rte_eth_fdir_info *fdir);
+void i40e_fdir_stats_get(struct rte_eth_dev *dev,
+ struct rte_eth_fdir_stats *stat);
int i40e_fdir_ctrl_func(struct rte_eth_dev *dev,
enum rte_filter_op filter_op,
void *arg);
const struct rte_eth_fdir_filter *filter,
bool add);
int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,
- const struct i40e_fdir_filter_conf *filter,
- bool add);
+ const struct i40e_fdir_filter_conf *filter,
+ bool add);
int i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
struct rte_eth_tunnel_filter_conf *tunnel_filter,
uint8_t add);
int i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size);
int i40e_rss_conf_init(struct i40e_rte_flow_rss_conf *out,
const struct rte_flow_action_rss *in);
-int i40e_action_rss_same(const struct rte_flow_action_rss *comp,
- const struct rte_flow_action_rss *with);
int i40e_config_rss_filter(struct i40e_pf *pf,
struct i40e_rte_flow_rss_conf *conf, bool add);
int i40e_vf_representor_init(struct rte_eth_dev *ethdev, void *init_params);
git.droids-corp.org / dpdk.git / blobdiff