ethdev: change device info get callback to return int
[dpdk.git] / drivers / net / i40e / i40e_ethdev_vf.c
index 5be32b0..95b7742 100644 (file)
@@ -75,8 +75,8 @@ enum i40evf_aq_result {
 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 static int i40evf_dev_start(struct rte_eth_dev *dev);
 static void i40evf_dev_stop(struct rte_eth_dev *dev);
-static void i40evf_dev_info_get(struct rte_eth_dev *dev,
-                               struct rte_eth_dev_info *dev_info);
+static int i40evf_dev_info_get(struct rte_eth_dev *dev,
+                              struct rte_eth_dev_info *dev_info);
 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
                                  int wait_to_complete);
 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
@@ -140,6 +140,8 @@ static int
 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
                        struct rte_ether_addr *mc_addr_set,
                        uint32_t nb_mc_addr);
+static void
+i40evf_dev_alarm_handler(void *param);
 
 /* Default hash key buffer for RSS */
 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
@@ -1051,10 +1053,14 @@ i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
        args.in_args_size = sizeof(vfres);
        args.out_buffer = vf->aq_resp;
        args.out_size = I40E_AQ_BUF_SZ;
+
+       rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
        err = i40evf_execute_vf_cmd(dev, &args);
        if (err)
                PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
 
+       rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
+                         i40evf_dev_alarm_handler, dev);
        return err;
 }
 
@@ -1405,7 +1411,7 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev)
                        }
                        break;
                default:
-                       PMD_DRV_LOG(ERR, "Request %u is not supported yet",
+                       PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
                                    aq_opc);
                        break;
                }
@@ -1480,7 +1486,6 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev)
                return 0;
        }
        i40e_set_default_ptype_table(eth_dev);
-       i40e_set_default_pctype_table(eth_dev);
        rte_eth_copy_pci_info(eth_dev, pci_dev);
 
        hw->vendor_id = pci_dev->id.vendor_id;
@@ -1498,6 +1503,7 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev)
                return -1;
        }
 
+       i40e_set_default_pctype_table(eth_dev);
        rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
                          i40evf_dev_alarm_handler, eth_dev);
 
@@ -1557,7 +1563,7 @@ static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
  */
 static struct rte_pci_driver rte_i40evf_pmd = {
        .id_table = pci_id_i40evf_map,
-       .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
+       .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
        .probe = eth_i40evf_pci_probe,
        .remove = eth_i40evf_pci_remove,
 };
@@ -2210,7 +2216,7 @@ i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
                vf->promisc_multicast_enabled = FALSE;
 }
 
-static void
+static int
 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 {
        struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
@@ -2286,6 +2292,8 @@ i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
                .nb_min = I40E_MIN_RING_DESC,
                .nb_align = I40E_ALIGN_RING_DESC,
        };
+
+       return 0;
 }
 
 static int
@@ -2592,7 +2600,10 @@ i40evf_config_rss(struct i40e_vf *vf)
        struct i40e_hw *hw = I40E_VF_TO_HW(vf);
        struct rte_eth_rss_conf rss_conf;
        uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
+       uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
        uint16_t num;
+       uint8_t *lut_info;
+       int ret;
 
        if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
                i40evf_disable_rss(vf);
@@ -2602,12 +2613,29 @@ i40evf_config_rss(struct i40e_vf *vf)
 
        num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
        /* Fill out the look up table */
-       for (i = 0, j = 0; i < nb_q; i++, j++) {
-               if (j >= num)
-                       j = 0;
-               lut = (lut << 8) | j;
-               if ((i & 3) == 3)
-                       I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
+       if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
+               for (i = 0, j = 0; i < nb_q; i++, j++) {
+                       if (j >= num)
+                               j = 0;
+                       lut = (lut << 8) | j;
+                       if ((i & 3) == 3)
+                               I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
+               }
+       } else {
+               lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
+               if (!lut_info) {
+                       PMD_DRV_LOG(ERR, "No memory can be allocated");
+                       return -ENOMEM;
+               }
+
+               for (i = 0; i < rss_lut_size; i++)
+                       lut_info[i] = i % vf->num_queue_pairs;
+
+               ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
+                                        rss_lut_size);
+               rte_free(lut_info);
+               if (ret)
+                       return ret;
        }
 
        rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;