int err = I40E_SUCCESS;
char z_name[RTE_MEMZONE_NAMESIZE];
const struct rte_memzone *mz = NULL;
- struct rte_eth_dev *eth_dev = pf->adapter->eth_dev;
+ struct rte_eth_dev *eth_dev = &rte_eth_devices[pf->dev_data->port_id];
uint16_t i;
if ((pf->flags & I40E_FLAG_FDIR) == 0) {
{
struct i40e_hw *hw = I40E_PF_TO_HW(pf);
struct i40e_vsi *vsi;
- struct rte_eth_dev *dev = pf->adapter->eth_dev;
+ struct rte_eth_dev *dev = &rte_eth_devices[pf->dev_data->port_id];
vsi = pf->fdir.fdir_vsi;
if (!vsi)
if (err)
PMD_DRV_LOG(DEBUG, "Failed to do FDIR RX switch off");
- i40e_dev_rx_queue_release(pf->fdir.rxq);
rte_eth_dma_zone_free(dev, "fdir_rx_ring", pf->fdir.rxq->queue_id);
+ i40e_dev_rx_queue_release(pf->fdir.rxq);
pf->fdir.rxq = NULL;
- i40e_dev_tx_queue_release(pf->fdir.txq);
rte_eth_dma_zone_free(dev, "fdir_tx_ring", pf->fdir.txq->queue_id);
+ i40e_dev_tx_queue_release(pf->fdir.txq);
pf->fdir.txq = NULL;
i40e_vsi_release(vsi);
pf->fdir.fdir_vsi = NULL;
}
/* Check if the configuration is conflicted */
- if (pf->fdir.inset_flag[pctype] &&
- memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t)))
- return -1;
+ if (pf->fdir.flow_count[pctype] &&
+ memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) {
+ PMD_DRV_LOG(ERR, "Conflict with the first rule's input set.");
+ return -EINVAL;
+ }
- if (pf->fdir.inset_flag[pctype] &&
+ if (pf->fdir.flow_count[pctype] &&
!memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t)))
return 0;
num = i40e_generate_inset_mask_reg(hw, input_set, mask_reg,
I40E_INSET_MASK_NUM_REG);
- if (num < 0)
+ if (num < 0) {
+ PMD_DRV_LOG(ERR, "Invalid pattern mask.");
return -EINVAL;
+ }
if (pf->support_multi_driver) {
for (i = 0; i < num; i++)
I40E_WRITE_FLUSH(hw);
pf->fdir.input_set[pctype] = input_set;
- pf->fdir.inset_flag[pctype] = 1;
return 0;
}
i40e_fdir_filter_convert(filter, &check_filter);
if (add) {
- if (filter->input.flow_ext.is_flex_flow) {
+ /* configure the input set for common PCTYPEs*/
+ if (!filter->input.flow_ext.customized_pctype &&
+ !filter->input.flow_ext.pkt_template) {
ret = i40e_flow_set_fdir_inset(pf, pctype,
filter->input.flow_ext.input_set);
- if (ret == -1) {
- PMD_DRV_LOG(ERR, "Conflict with the"
- " first rule's input set.");
- return -EINVAL;
- } else if (ret == -EINVAL) {
- PMD_DRV_LOG(ERR, "Invalid pattern mask.");
- return -EINVAL;
- }
+ if (ret < 0)
+ return ret;
+ }
+ if (filter->input.flow_ext.is_flex_flow) {
for (i = 0; i < filter->input.flow_ext.raw_id; i++) {
layer_idx = filter->input.flow_ext.layer_idx;
field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;
}
if (add) {
+ fdir_info->flow_count[pctype]++;
fdir_info->fdir_actual_cnt++;
if (fdir_info->fdir_invalprio == 1 &&
fdir_info->fdir_guarantee_free_space > 0)
fdir_info->fdir_guarantee_free_space--;
} else {
+ fdir_info->flow_count[pctype]--;
fdir_info->fdir_actual_cnt--;
if (fdir_info->fdir_invalprio == 1 &&
fdir_info->fdir_guarantee_free_space <