net/qede: remove flags from Tx entry

[dpdk.git] / drivers / net / i40e / i40e_fdir.c

diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
index 50c0eee..c572d00 100644 (file)
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -11,7 +11,7 @@
 #include <stdarg.h>
 
 #include <rte_ether.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 #include <rte_log.h>
 #include <rte_memzone.h>
 #include <rte_malloc.h>
@@ -116,7 +116,7 @@ i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)
 #endif
        rx_ctx.dtype = i40e_header_split_none;
        rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
-       rx_ctx.rxmax = RTE_ETHER_MAX_LEN;
+       rx_ctx.rxmax = I40E_ETH_MAX_LEN;
        rx_ctx.tphrdesc_ena = 1;
        rx_ctx.tphwdesc_ena = 1;
        rx_ctx.tphdata_ena = 1;
@@ -355,6 +355,7 @@ i40e_init_flx_pld(struct i40e_pf *pf)
                        I40E_PRTQF_FLX_PIT(index + 1), 0x0000FC29);/*non-used*/
                I40E_WRITE_REG(hw,
                        I40E_PRTQF_FLX_PIT(index + 2), 0x0000FC2A);/*non-used*/
+               pf->fdir.flex_pit_flag[i] = 0;
        }
 
        /* initialize the masks */
@@ -1513,8 +1514,6 @@ i40e_flow_set_fdir_flex_pit(struct i40e_pf *pf,
                I40E_WRITE_REG(hw, I40E_PRTQF_FLX_PIT(field_idx), flx_pit);
                min_next_off++;
        }
-
-       pf->fdir.flex_pit_flag[layer_idx] = 1;
 }
 
 static int
@@ -1686,7 +1685,7 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,
        i40e_fdir_filter_convert(filter, &check_filter);
 
        if (add) {
-               if (!filter->input.flow_ext.customized_pctype) {
+               if (filter->input.flow_ext.is_flex_flow) {
                        for (i = 0; i < filter->input.flow_ext.raw_id; i++) {
                                layer_idx = filter->input.flow_ext.layer_idx;
                                field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;
@@ -1738,6 +1737,9 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,
                                fdir_info->fdir_guarantee_free_space > 0)
                        wait_status = false;
        } else {
+               if (filter->input.flow_ext.is_flex_flow)
+                       layer_idx = filter->input.flow_ext.layer_idx;
+
                node = i40e_sw_fdir_filter_lookup(fdir_info,
                                &check_filter.fdir.input);
                if (!node) {
@@ -1785,6 +1787,17 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,
                goto error_op;
        }
 
+       if (filter->input.flow_ext.is_flex_flow) {
+               if (add) {
+                       fdir_info->flex_flow_count[layer_idx]++;
+                       pf->fdir.flex_pit_flag[layer_idx] = 1;
+               } else {
+                       fdir_info->flex_flow_count[layer_idx]--;
+                       if (!fdir_info->flex_flow_count[layer_idx])
+                               pf->fdir.flex_pit_flag[layer_idx] = 0;
+               }
+       }
+
        if (add) {
                fdir_info->fdir_actual_cnt++;
                if (fdir_info->fdir_invalprio == 1 &&