net/hinic: refactor checksum functions

[dpdk.git] / drivers / net / i40e / i40e_flow.c

diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index 8c36f29..51d8fdd 100644 (file)
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -2047,9 +2047,6 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev,
        const struct rte_flow_item_eth *eth_spec;
        const struct rte_flow_item_eth *eth_mask;
        enum rte_flow_item_type item_type;
-       uint16_t outer_tpid;
-
-       outer_tpid = i40e_get_outer_vlan(dev);
 
        for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
                if (item->last) {
@@ -2109,7 +2106,7 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev,
                        if (filter->ether_type == RTE_ETHER_TYPE_IPV4 ||
                            filter->ether_type == RTE_ETHER_TYPE_IPV6 ||
                            filter->ether_type == RTE_ETHER_TYPE_LLDP ||
-                           filter->ether_type == outer_tpid) {
+                           filter->ether_type == i40e_get_outer_vlan(dev)) {
                                rte_flow_error_set(error, EINVAL,
                                                   RTE_FLOW_ERROR_TYPE_ITEM,
                                                   item,
@@ -2611,7 +2608,6 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
        uint16_t flex_size;
        bool cfg_flex_pit = true;
        bool cfg_flex_msk = true;
-       uint16_t outer_tpid;
        uint16_t ether_type;
        uint32_t vtc_flow_cpu;
        bool outer_ip = true;
@@ -2620,7 +2616,6 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
        memset(off_arr, 0, sizeof(off_arr));
        memset(len_arr, 0, sizeof(len_arr));
        memset(flex_mask, 0, I40E_FDIR_MAX_FLEX_LEN);
-       outer_tpid = i40e_get_outer_vlan(dev);
        filter->input.flow_ext.customized_pctype = false;
        for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
                if (item->last) {
@@ -2688,7 +2683,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
                                if (next_type == RTE_FLOW_ITEM_TYPE_VLAN ||
                                    ether_type == RTE_ETHER_TYPE_IPV4 ||
                                    ether_type == RTE_ETHER_TYPE_IPV6 ||
-                                   ether_type == outer_tpid) {
+                                   ether_type == i40e_get_outer_vlan(dev)) {
                                        rte_flow_error_set(error, EINVAL,
                                                     RTE_FLOW_ERROR_TYPE_ITEM,
                                                     item,
@@ -2732,7 +2727,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
 
                                if (ether_type == RTE_ETHER_TYPE_IPV4 ||
                                    ether_type == RTE_ETHER_TYPE_IPV6 ||
-                                   ether_type == outer_tpid) {
+                                   ether_type == i40e_get_outer_vlan(dev)) {
                                        rte_flow_error_set(error, EINVAL,
                                                     RTE_FLOW_ERROR_TYPE_ITEM,
                                                     item,
@@ -4856,11 +4851,12 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
        const struct rte_flow_action *act;
        const struct rte_flow_action_rss *rss;
        struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+       struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
        struct i40e_queue_regions *info = &pf->queue_region;
        struct i40e_rte_flow_rss_conf *rss_config =
                        &filter->rss_conf;
        struct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info;
-       uint16_t i, j, n, tmp, nb_types;
+       uint16_t i, j, n, m, tmp, nb_types;
        uint32_t index = 0;
        uint64_t hf_bit = 1;
 
@@ -4892,6 +4888,24 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
                        I40E_FILTER_PCTYPE_L2_PAYLOAD},
        };
 
+       static const struct {
+               uint64_t rss_type;
+               enum i40e_filter_pctype pctype;
+       } pctype_match_table_x722[] = {
+               {ETH_RSS_NONFRAG_IPV4_TCP,
+                       I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK},
+               {ETH_RSS_NONFRAG_IPV4_UDP,
+                       I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP},
+               {ETH_RSS_NONFRAG_IPV4_UDP,
+                       I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP},
+               {ETH_RSS_NONFRAG_IPV6_TCP,
+                       I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK},
+               {ETH_RSS_NONFRAG_IPV6_UDP,
+                       I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP},
+               {ETH_RSS_NONFRAG_IPV6_UDP,
+                       I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP},
+       };
+
        NEXT_ITEM_OF_ACTION(act, actions, index);
        rss = act->conf;
 
@@ -4917,6 +4931,18 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
                                break;
                        }
                }
+
+               if (hw->mac.type == I40E_MAC_X722)
+                       for (j = 0; j < RTE_DIM(pctype_match_table_x722); j++) {
+                               if (rss->types &
+                                   pctype_match_table_x722[j].rss_type) {
+                                       m = conf_info->region[0].flowtype_num;
+                                       conf_info->region[0].hw_flowtype[m] =
+                                               pctype_match_table_x722[j].pctype;
+                                       conf_info->region[0].flowtype_num++;
+                                       conf_info->queue_region_number = 1;
+                               }
+                       }
        }
 
        /**
@@ -5014,9 +5040,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
                                        info->region[i].user_priority_num++;
                                }
 
-                               j = info->region[i].flowtype_num;
-                               tmp = conf_info->region[n].hw_flowtype[0];
-                               if (conf_info->region[n].flowtype_num) {
+                               for (m = 0; m < conf_info->region[n].flowtype_num; m++) {
+                                       j = info->region[i].flowtype_num;
+                                       tmp = conf_info->region[n].hw_flowtype[m];
                                        info->region[i].hw_flowtype[j] = tmp;
                                        info->region[i].flowtype_num++;
                                }
@@ -5029,9 +5055,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
                                        info->region[i].user_priority_num++;
                                }
 
-                               j = info->region[i].flowtype_num;
-                               tmp = conf_info->region[n].hw_flowtype[0];
-                               if (conf_info->region[n].flowtype_num) {
+                               for (m = 0; m < conf_info->region[n].flowtype_num; m++) {
+                                       j = info->region[i].flowtype_num;
+                                       tmp = conf_info->region[n].hw_flowtype[m];
                                        info->region[i].hw_flowtype[j] = tmp;
                                        info->region[i].flowtype_num++;
                                }