tlv = (struct i40e_profile_tlv_section_record *)&proto[1];
for (i = j = 0; i < nb_rec; j++) {
pinfo[j].proto_id = tlv->data[0];
- strncpy(pinfo[j].name, (const char *)&tlv->data[1],
- I40E_DDP_NAME_SIZE);
+ snprintf(pinfo[j].name, I40E_DDP_NAME_SIZE, "%s",
+ (const char *)&tlv->data[1]);
i += tlv->len;
tlv = &tlv[tlv->len];
}
}
int
-rte_pmd_i40e_add_vf_mac_addr(uint8_t port, uint16_t vf_id,
+rte_pmd_i40e_add_vf_mac_addr(uint16_t port, uint16_t vf_id,
struct ether_addr *mac_addr)
{
struct rte_eth_dev *dev;
return 0;
}
-int rte_pmd_i40e_flow_type_mapping_reset(uint8_t port)
+int rte_pmd_i40e_flow_type_mapping_reset(uint16_t port)
{
struct rte_eth_dev *dev;
}
int rte_pmd_i40e_flow_type_mapping_get(
- uint8_t port,
+ uint16_t port,
struct rte_pmd_i40e_flow_type_mapping *mapping_items)
{
struct rte_eth_dev *dev;
int
rte_pmd_i40e_flow_type_mapping_update(
- uint8_t port,
+ uint16_t port,
struct rte_pmd_i40e_flow_type_mapping *mapping_items,
uint16_t count,
uint8_t exclusive)
return ret;
}
+
+int rte_pmd_i40e_flow_add_del_packet_template(
+ uint16_t port,
+ const struct rte_pmd_i40e_pkt_template_conf *conf,
+ uint8_t add)
+{
+ struct rte_eth_dev *dev = &rte_eth_devices[port];
+ struct i40e_fdir_filter_conf filter_conf;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ memset(&filter_conf, 0, sizeof(filter_conf));
+ filter_conf.soft_id = conf->soft_id;
+ filter_conf.input.flow.raw_flow.pctype = conf->input.pctype;
+ filter_conf.input.flow.raw_flow.packet = conf->input.packet;
+ filter_conf.input.flow.raw_flow.length = conf->input.length;
+ filter_conf.input.flow_ext.pkt_template = true;
+
+ filter_conf.action.rx_queue = conf->action.rx_queue;
+ filter_conf.action.behavior =
+ (enum i40e_fdir_behavior)conf->action.behavior;
+ filter_conf.action.report_status =
+ (enum i40e_fdir_status)conf->action.report_status;
+ filter_conf.action.flex_off = conf->action.flex_off;
+
+ return i40e_flow_add_del_fdir_filter(dev, &filter_conf, add);
+}