static int iavf_set_mc_addr_list(struct rte_eth_dev *dev,
struct rte_ether_addr *mc_addrs,
uint32_t mc_addrs_num);
+static int iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg);
static const struct rte_pci_id pci_id_iavf_map[] = {
{ RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) },
+ { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF) },
+ { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF_HV) },
+ { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_VF) },
+ { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_A0_VF) },
{ .vendor_id = 0, /* sentinel */ },
};
.flow_ops_get = iavf_dev_flow_ops_get,
.tx_done_cleanup = iavf_dev_tx_done_cleanup,
.get_monitor_addr = iavf_get_monitor_addr,
+ .tm_ops_get = iavf_tm_ops_get,
};
+static int
+iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
+ void *arg)
+{
+ if (!arg)
+ return -EINVAL;
+
+ *(const void **)arg = &iavf_tm_ops;
+
+ return 0;
+}
+
static int
iavf_set_mc_addr_list(struct rte_eth_dev *dev,
struct rte_ether_addr *mc_addrs,
return err;
}
+static int
+iavf_config_rss_hf(struct iavf_adapter *adapter, uint64_t rss_hf)
+{
+ static const uint64_t map_hena_rss[] = {
+ /* IPv4 */
+ [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] =
+ ETH_RSS_NONFRAG_IPV4_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] =
+ ETH_RSS_NONFRAG_IPV4_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV4_UDP] =
+ ETH_RSS_NONFRAG_IPV4_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] =
+ ETH_RSS_NONFRAG_IPV4_TCP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP] =
+ ETH_RSS_NONFRAG_IPV4_TCP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP] =
+ ETH_RSS_NONFRAG_IPV4_SCTP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER] =
+ ETH_RSS_NONFRAG_IPV4_OTHER,
+ [IAVF_FILTER_PCTYPE_FRAG_IPV4] = ETH_RSS_FRAG_IPV4,
+
+ /* IPv6 */
+ [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] =
+ ETH_RSS_NONFRAG_IPV6_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] =
+ ETH_RSS_NONFRAG_IPV6_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV6_UDP] =
+ ETH_RSS_NONFRAG_IPV6_UDP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] =
+ ETH_RSS_NONFRAG_IPV6_TCP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP] =
+ ETH_RSS_NONFRAG_IPV6_TCP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP] =
+ ETH_RSS_NONFRAG_IPV6_SCTP,
+ [IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER] =
+ ETH_RSS_NONFRAG_IPV6_OTHER,
+ [IAVF_FILTER_PCTYPE_FRAG_IPV6] = ETH_RSS_FRAG_IPV6,
+
+ /* L2 Payload */
+ [IAVF_FILTER_PCTYPE_L2_PAYLOAD] = ETH_RSS_L2_PAYLOAD
+ };
+
+ const uint64_t ipv4_rss = ETH_RSS_NONFRAG_IPV4_UDP |
+ ETH_RSS_NONFRAG_IPV4_TCP |
+ ETH_RSS_NONFRAG_IPV4_SCTP |
+ ETH_RSS_NONFRAG_IPV4_OTHER |
+ ETH_RSS_FRAG_IPV4;
+
+ const uint64_t ipv6_rss = ETH_RSS_NONFRAG_IPV6_UDP |
+ ETH_RSS_NONFRAG_IPV6_TCP |
+ ETH_RSS_NONFRAG_IPV6_SCTP |
+ ETH_RSS_NONFRAG_IPV6_OTHER |
+ ETH_RSS_FRAG_IPV6;
+
+ struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
+ uint64_t caps = 0, hena = 0, valid_rss_hf = 0;
+ uint32_t i;
+ int ret;
+
+ ret = iavf_get_hena_caps(adapter, &caps);
+ if (ret)
+ return ret;
+ /**
+ * ETH_RSS_IPV4 and ETH_RSS_IPV6 can be considered as 2
+ * generalizations of all other IPv4 and IPv6 RSS types.
+ */
+ if (rss_hf & ETH_RSS_IPV4)
+ rss_hf |= ipv4_rss;
+
+ if (rss_hf & ETH_RSS_IPV6)
+ rss_hf |= ipv6_rss;
+
+ RTE_BUILD_BUG_ON(RTE_DIM(map_hena_rss) > sizeof(uint64_t) * CHAR_BIT);
+
+ for (i = 0; i < RTE_DIM(map_hena_rss); i++) {
+ uint64_t bit = BIT_ULL(i);
+
+ if ((caps & bit) && (map_hena_rss[i] & rss_hf)) {
+ valid_rss_hf |= map_hena_rss[i];
+ hena |= bit;
+ }
+ }
+
+ ret = iavf_set_hena(adapter, hena);
+ if (ret)
+ return ret;
+
+ if (valid_rss_hf & ipv4_rss)
+ valid_rss_hf |= rss_hf & ETH_RSS_IPV4;
+
+ if (valid_rss_hf & ipv6_rss)
+ valid_rss_hf |= rss_hf & ETH_RSS_IPV6;
+
+ if (rss_hf & ~valid_rss_hf)
+ PMD_DRV_LOG(WARNING, "Unsupported rss_hf 0x%" PRIx64,
+ rss_hf & ~valid_rss_hf);
+
+ vf->rss_hf = valid_rss_hf;
+ return 0;
+}
+
static int
iavf_init_rss(struct iavf_adapter *adapter)
{
PMD_DRV_LOG(DEBUG, "RSS is not supported");
return -ENOTSUP;
}
- if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
- PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default");
- /* set all lut items to default queue */
- for (i = 0; i < vf->vf_res->rss_lut_size; i++)
- vf->rss_lut[i] = 0;
- ret = iavf_configure_rss_lut(adapter);
- return ret;
- }
/* configure RSS key */
if (!rss_conf->rss_key) {
/* Calculate the default hash key */
- for (i = 0; i <= vf->vf_res->rss_key_size; i++)
+ for (i = 0; i < vf->vf_res->rss_key_size; i++)
vf->rss_key[i] = (uint8_t)rte_rand();
} else
rte_memcpy(vf->rss_key, rss_conf->rss_key,
PMD_DRV_LOG(ERR, "fail to set default RSS");
return ret;
}
+ } else {
+ ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf);
+ if (ret != -ENOTSUP)
+ return ret;
}
return 0;
dev->data->nb_tx_queues);
num_queue_pairs = vf->num_queue_pairs;
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
+ if (iavf_get_qos_cap(adapter)) {
+ PMD_INIT_LOG(ERR, "Failed to get qos capability");
+ return -1;
+ }
+
if (iavf_init_queues(dev) != 0) {
PMD_DRV_LOG(ERR, "failed to do Queue init");
return -1;
PMD_DRV_LOG(ERR, "fail to set new RSS");
return ret;
}
+ } else {
+ ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf);
+ if (ret != -ENOTSUP)
+ return ret;
}
return 0;
PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
goto err_api;
}
+
if (iavf_get_vf_resource(adapter) != 0) {
PMD_INIT_LOG(ERR, "iavf_get_vf_config failed");
goto err_alloc;
}
}
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) {
+ bufsz = sizeof(struct virtchnl_qos_cap_list) +
+ IAVF_MAX_TRAFFIC_CLASS *
+ sizeof(struct virtchnl_qos_cap_elem);
+ vf->qos_cap = rte_zmalloc("qos_cap", bufsz, 0);
+ if (!vf->qos_cap) {
+ PMD_INIT_LOG(ERR, "unable to allocate qos_cap memory");
+ goto err_rss;
+ }
+ iavf_tm_conf_init(dev);
+ }
+
iavf_init_proto_xtr(dev);
return 0;
rte_free(vf->rss_key);
rte_free(vf->rss_lut);
err_alloc:
+ rte_free(vf->qos_cap);
rte_free(vf->vf_res);
vf->vsi_res = NULL;
err_api:
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
int ret = 0;
- if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) {
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
/* Set hena = 0 to ask PF to cleanup all existing RSS. */
ret = iavf_set_hena(adapter, 0);
if (ret)
iavf_dev_interrupt_handler, dev);
iavf_disable_irq0(hw);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
+ iavf_tm_conf_uninit(dev);
+
if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
if (vf->rss_lut) {
rte_free(vf->rss_lut);
rte_free(vf->aq_resp);
vf->aq_resp = NULL;
- vf->vf_reset = false;
+ /*
+ * If the VF is reset via VFLR, the device will be knocked out of bus
+ * master mode, and the driver will fail to recover from the reset. Fix
+ * this by enabling bus mastering after every reset. In a non-VFLR case,
+ * the bus master bit will not be disabled, and this call will have no
+ * effect.
+ */
+ if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true))
+ vf->vf_reset = false;
return ret;
}
return ret;
}
+static int
+iavf_drv_i40evf_check_handler(__rte_unused const char *key,
+ const char *value, __rte_unused void *opaque)
+{
+ if (strcmp(value, "i40evf"))
+ return -1;
+
+ return 0;
+}
+
+static int
+iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)
+{
+ struct rte_kvargs *kvlist;
+ int ret = 0;
+
+ if (device_id != IAVF_DEV_ID_VF &&
+ device_id != IAVF_DEV_ID_VF_HV &&
+ device_id != IAVF_DEV_ID_X722_VF &&
+ device_id != IAVF_DEV_ID_X722_A0_VF)
+ return 0;
+
+ if (devargs == NULL)
+ return 0;
+
+ kvlist = rte_kvargs_parse(devargs->args, NULL);
+ if (kvlist == NULL)
+ return 0;
+
+ if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))
+ goto exit;
+
+ /* i40evf driver selected when there's a key-value pair:
+ * driver=i40evf
+ */
+ if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,
+ iavf_drv_i40evf_check_handler, NULL) < 0)
+ goto exit;
+
+ ret = 1;
+
+exit:
+ rte_kvargs_free(kvlist);
+ return ret;
+}
+
static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
- if (iavf_dcf_cap_selected(pci_dev->device.devargs))
+ if (iavf_dcf_cap_selected(pci_dev->device.devargs) ||
+ iavf_drv_i40evf_selected(pci_dev->device.devargs,
+ pci_dev->id.device_id))
return 1;
return rte_eth_dev_pci_generic_probe(pci_dev,
RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map);
RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci");
-RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf");
-RTE_LOG_REGISTER(iavf_logtype_init, pmd.net.iavf.init, NOTICE);
-RTE_LOG_REGISTER(iavf_logtype_driver, pmd.net.iavf.driver, NOTICE);
+RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf driver=i40evf");
+RTE_LOG_REGISTER_SUFFIX(iavf_logtype_init, init, NOTICE);
+RTE_LOG_REGISTER_SUFFIX(iavf_logtype_driver, driver, NOTICE);
#ifdef RTE_ETHDEV_DEBUG_RX
-RTE_LOG_REGISTER(iavf_logtype_rx, pmd.net.iavf.rx, DEBUG);
+RTE_LOG_REGISTER_SUFFIX(iavf_logtype_rx, rx, DEBUG);
#endif
#ifdef RTE_ETHDEV_DEBUG_TX
-RTE_LOG_REGISTER(iavf_logtype_tx, pmd.net.iavf.tx, DEBUG);
+RTE_LOG_REGISTER_SUFFIX(iavf_logtype_tx, tx, DEBUG);
#endif