#include <rte_interrupts.h>
#include <rte_debug.h>
#include <rte_pci.h>
+#include <rte_alarm.h>
#include <rte_atomic.h>
#include <rte_eal.h>
#include <rte_ether.h>
static int iavf_set_mc_addr_list(struct rte_eth_dev *dev,
struct rte_ether_addr *mc_addrs,
uint32_t mc_addrs_num);
+static int iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg);
static const struct rte_pci_id pci_id_iavf_map[] = {
{ RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) },
.flow_ops_get = iavf_dev_flow_ops_get,
.tx_done_cleanup = iavf_dev_tx_done_cleanup,
.get_monitor_addr = iavf_get_monitor_addr,
+ .tm_ops_get = iavf_tm_ops_get,
};
+static int
+iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
+ void *arg)
+{
+ if (!arg)
+ return -EINVAL;
+
+ *(const void **)arg = &iavf_tm_ops;
+
+ return 0;
+}
+
static int
iavf_set_mc_addr_list(struct rte_eth_dev *dev,
struct rte_ether_addr *mc_addrs,
return err;
}
-static int
+static void
iavf_config_rss_hf(struct iavf_adapter *adapter, uint64_t rss_hf)
{
static const uint64_t map_hena_rss[] = {
int ret;
ret = iavf_get_hena_caps(adapter, &caps);
- if (ret)
- return ret;
+ if (ret) {
+ /**
+ * RSS offload type configuration is not a necessary feature
+ * for VF, so here just print a warning and return.
+ */
+ PMD_DRV_LOG(WARNING,
+ "fail to get RSS offload type caps, ret: %d", ret);
+ return;
+ }
+
/**
* ETH_RSS_IPV4 and ETH_RSS_IPV6 can be considered as 2
* generalizations of all other IPv4 and IPv6 RSS types.
}
ret = iavf_set_hena(adapter, hena);
- if (ret)
- return ret;
+ if (ret) {
+ /**
+ * RSS offload type configuration is not a necessary feature
+ * for VF, so here just print a warning and return.
+ */
+ PMD_DRV_LOG(WARNING,
+ "fail to set RSS offload types, ret: %d", ret);
+ return;
+ }
if (valid_rss_hf & ipv4_rss)
valid_rss_hf |= rss_hf & ETH_RSS_IPV4;
rss_hf & ~valid_rss_hf);
vf->rss_hf = valid_rss_hf;
- return 0;
}
static int
/* configure RSS key */
if (!rss_conf->rss_key) {
/* Calculate the default hash key */
- for (i = 0; i <= vf->vf_res->rss_key_size; i++)
+ for (i = 0; i < vf->vf_res->rss_key_size; i++)
vf->rss_key[i] = (uint8_t)rte_rand();
} else
rte_memcpy(vf->rss_key, rss_conf->rss_key,
return ret;
}
} else {
- ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf);
- if (ret != -ENOTSUP)
- return ret;
+ iavf_config_rss_hf(adapter, rss_conf->rss_hf);
}
return 0;
{
struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct rte_eth_dev_data *dev_data = dev->data;
- uint16_t buf_size, max_pkt_len, len;
+ uint16_t buf_size, max_pkt_len;
buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM;
/* Calculate the maximum packet length allowed */
- len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS;
- max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len);
+ max_pkt_len = RTE_MIN((uint32_t)
+ rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS,
+ dev->data->dev_conf.rxmode.max_rx_pkt_len);
/* Check if the jumbo frame and maximum packet length are set
* correctly.
if (!qv_map) {
PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map",
dev->data->nb_rx_queues);
- return -1;
+ goto qv_map_alloc_err;
}
if (!dev->data->dev_conf.intr_conf.rxq ||
*/
vf->msix_base = IAVF_MISC_VEC_ID;
- /* set ITR to max */
+ /* set ITR to default */
interval = iavf_calc_itr_interval(
- IAVF_QUEUE_ITR_INTERVAL_MAX);
+ IAVF_QUEUE_ITR_INTERVAL_DEFAULT);
IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,
IAVF_VFINT_DYN_CTL01_INTENA_MASK |
(IAVF_ITR_INDEX_DEFAULT <<
if (!vf->lv_enabled) {
if (iavf_config_irq_map(adapter)) {
PMD_DRV_LOG(ERR, "config interrupt mapping failed");
- return -1;
+ goto config_irq_map_err;
}
} else {
uint16_t num_qv_maps = dev->data->nb_rx_queues;
if (iavf_config_irq_map_lv(adapter,
IAVF_IRQ_MAP_NUM_PER_BUF, index)) {
PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed");
- return -1;
+ goto config_irq_map_err;
}
num_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF;
index += IAVF_IRQ_MAP_NUM_PER_BUF;
if (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) {
PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed");
- return -1;
+ goto config_irq_map_err;
}
}
return 0;
+
+config_irq_map_err:
+ rte_free(vf->qv_map);
+ vf->qv_map = NULL;
+
+qv_map_alloc_err:
+ rte_free(intr_handle->intr_vec);
+ intr_handle->intr_vec = NULL;
+
+ return -1;
}
static int
dev->data->nb_tx_queues);
num_queue_pairs = vf->num_queue_pairs;
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
+ if (iavf_get_qos_cap(adapter)) {
+ PMD_INIT_LOG(ERR, "Failed to get qos capability");
+ return -1;
+ }
+
if (iavf_init_queues(dev) != 0) {
PMD_DRV_LOG(ERR, "failed to do Queue init");
return -1;
}
/* re-enable intr again, because efd assign may change */
if (dev->data->dev_conf.intr_conf.rxq != 0) {
- rte_intr_disable(intr_handle);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
+ rte_intr_disable(intr_handle);
rte_intr_enable(intr_handle);
}
PMD_INIT_FUNC_TRACE();
+ if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) &&
+ dev->data->dev_conf.intr_conf.rxq != 0)
+ rte_intr_disable(intr_handle);
+
if (adapter->stopped == 1)
return 0;
return ret;
}
} else {
- ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf);
- if (ret != -ENOTSUP)
- return ret;
+ iavf_config_rss_hf(adapter, rss_conf->rss_hf);
}
return 0;
ret = iavf_add_del_eth_addr(adapter, old_addr, false, VIRTCHNL_ETHER_ADDR_PRIMARY);
if (ret)
PMD_DRV_LOG(ERR, "Fail to delete old MAC:"
- " %02X:%02X:%02X:%02X:%02X:%02X",
- old_addr->addr_bytes[0],
- old_addr->addr_bytes[1],
- old_addr->addr_bytes[2],
- old_addr->addr_bytes[3],
- old_addr->addr_bytes[4],
- old_addr->addr_bytes[5]);
+ RTE_ETHER_ADDR_PRT_FMT,
+ RTE_ETHER_ADDR_BYTES(old_addr));
ret = iavf_add_del_eth_addr(adapter, mac_addr, true, VIRTCHNL_ETHER_ADDR_PRIMARY);
if (ret)
PMD_DRV_LOG(ERR, "Fail to add new MAC:"
- " %02X:%02X:%02X:%02X:%02X:%02X",
- mac_addr->addr_bytes[0],
- mac_addr->addr_bytes[1],
- mac_addr->addr_bytes[2],
- mac_addr->addr_bytes[3],
- mac_addr->addr_bytes[4],
- mac_addr->addr_bytes[5]);
+ RTE_ETHER_ADDR_PRT_FMT,
+ RTE_ETHER_ADDR_BYTES(mac_addr));
if (ret)
return -EIO;
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter);
+ struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
uint16_t msix_intr;
msix_intr = pci_dev->intr_handle.intr_vec[queue_id];
IAVF_WRITE_FLUSH(hw);
- rte_intr_ack(&pci_dev->intr_handle);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
+ rte_intr_ack(&pci_dev->intr_handle);
return 0;
}
PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
goto err_api;
}
+
if (iavf_get_vf_resource(adapter) != 0) {
PMD_INIT_LOG(ERR, "iavf_get_vf_config failed");
goto err_alloc;
}
}
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) {
+ bufsz = sizeof(struct virtchnl_qos_cap_list) +
+ IAVF_MAX_TRAFFIC_CLASS *
+ sizeof(struct virtchnl_qos_cap_elem);
+ vf->qos_cap = rte_zmalloc("qos_cap", bufsz, 0);
+ if (!vf->qos_cap) {
+ PMD_INIT_LOG(ERR, "unable to allocate qos_cap memory");
+ goto err_rss;
+ }
+ iavf_tm_conf_init(dev);
+ }
+
iavf_init_proto_xtr(dev);
return 0;
rte_free(vf->rss_key);
rte_free(vf->rss_lut);
err_alloc:
+ rte_free(vf->qos_cap);
rte_free(vf->vf_res);
vf->vsi_res = NULL;
err_api:
return -1;
}
+static void
+iavf_uninit_vf(struct rte_eth_dev *dev)
+{
+ struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
+
+ iavf_shutdown_adminq(hw);
+
+ rte_free(vf->vf_res);
+ vf->vsi_res = NULL;
+ vf->vf_res = NULL;
+
+ rte_free(vf->aq_resp);
+ vf->aq_resp = NULL;
+
+ rte_free(vf->qos_cap);
+ vf->qos_cap = NULL;
+
+ rte_free(vf->rss_lut);
+ vf->rss_lut = NULL;
+ rte_free(vf->rss_key);
+ vf->rss_key = NULL;
+}
+
/* Enable default admin queue interrupt setting */
static inline void
iavf_enable_irq0(struct iavf_hw *hw)
iavf_enable_irq0(hw);
}
+void
+iavf_dev_alarm_handler(void *param)
+{
+ struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
+ struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint32_t icr0;
+
+ iavf_disable_irq0(hw);
+
+ /* read out interrupt causes */
+ icr0 = IAVF_READ_REG(hw, IAVF_VFINT_ICR01);
+
+ if (icr0 & IAVF_VFINT_ICR01_ADMINQ_MASK) {
+ PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
+ iavf_handle_virtchnl_msg(dev);
+ }
+
+ iavf_enable_irq0(hw);
+
+ rte_eal_alarm_set(IAVF_ALARM_INTERVAL,
+ iavf_dev_alarm_handler, dev);
+}
+
static int
iavf_dev_flow_ops_get(struct rte_eth_dev *dev,
const struct rte_flow_ops **ops)
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private);
struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter);
+ struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
int ret = 0;
PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
" store MAC addresses",
RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto init_vf_err;
}
/* If the MAC address is not configured by host,
* generate a random one.
rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
ð_dev->data->mac_addrs[0]);
- /* register callback func to eal lib */
- rte_intr_callback_register(&pci_dev->intr_handle,
- iavf_dev_interrupt_handler,
- (void *)eth_dev);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {
+ /* register callback func to eal lib */
+ rte_intr_callback_register(&pci_dev->intr_handle,
+ iavf_dev_interrupt_handler,
+ (void *)eth_dev);
- /* enable uio intr after callback register */
- rte_intr_enable(&pci_dev->intr_handle);
+ /* enable uio intr after callback register */
+ rte_intr_enable(&pci_dev->intr_handle);
+ } else {
+ rte_eal_alarm_set(IAVF_ALARM_INTERVAL,
+ iavf_dev_alarm_handler, eth_dev);
+ }
/* configure and enable device interrupt */
iavf_enable_irq0(hw);
ret = iavf_flow_init(adapter);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to initialize flow");
- return ret;
+ goto flow_init_err;
}
iavf_default_rss_disable(adapter);
return 0;
+
+flow_init_err:
+ rte_free(eth_dev->data->mac_addrs);
+ eth_dev->data->mac_addrs = NULL;
+
+init_vf_err:
+ iavf_uninit_vf(eth_dev);
+
+ return ret;
}
static int
iavf_config_promisc(adapter, false, false);
iavf_shutdown_adminq(hw);
- /* disable uio intr before callback unregister */
- rte_intr_disable(intr_handle);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {
+ /* disable uio intr before callback unregister */
+ rte_intr_disable(intr_handle);
- /* unregister callback func from eal lib */
- rte_intr_callback_unregister(intr_handle,
- iavf_dev_interrupt_handler, dev);
+ /* unregister callback func from eal lib */
+ rte_intr_callback_unregister(intr_handle,
+ iavf_dev_interrupt_handler, dev);
+ } else {
+ rte_eal_alarm_cancel(iavf_dev_alarm_handler, dev);
+ }
iavf_disable_irq0(hw);
+ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
+ iavf_tm_conf_uninit(dev);
+
if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
if (vf->rss_lut) {
rte_free(vf->rss_lut);
rte_free(vf->aq_resp);
vf->aq_resp = NULL;
- vf->vf_reset = false;
+ /*
+ * If the VF is reset via VFLR, the device will be knocked out of bus
+ * master mode, and the driver will fail to recover from the reset. Fix
+ * this by enabling bus mastering after every reset. In a non-VFLR case,
+ * the bus master bit will not be disabled, and this call will have no
+ * effect.
+ */
+ if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true))
+ vf->vf_reset = false;
return ret;
}
return ret;
}
-static int
-iavf_drv_i40evf_check_handler(__rte_unused const char *key,
- const char *value, __rte_unused void *opaque)
-{
- if (strcmp(value, "i40evf"))
- return -1;
-
- return 0;
-}
-
-static int
-iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)
-{
- struct rte_kvargs *kvlist;
- const char *key = "driver";
- int ret = 0;
-
- if (device_id != IAVF_DEV_ID_VF &&
- device_id != IAVF_DEV_ID_VF_HV &&
- device_id != IAVF_DEV_ID_X722_VF &&
- device_id != IAVF_DEV_ID_X722_A0_VF)
- return 0;
-
- if (devargs == NULL)
- return 0;
-
- kvlist = rte_kvargs_parse(devargs->args, NULL);
- if (kvlist == NULL)
- return 0;
-
- if (!rte_kvargs_count(kvlist, key))
- goto exit;
-
- /* i40evf driver selected when there's a key-value pair:
- * driver=i40evf
- */
- if (rte_kvargs_process(kvlist, key,
- iavf_drv_i40evf_check_handler, NULL) < 0)
- goto exit;
-
- ret = 1;
-
-exit:
- rte_kvargs_free(kvlist);
- return ret;
-}
-
static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
- if (iavf_dcf_cap_selected(pci_dev->device.devargs) ||
- iavf_drv_i40evf_selected(pci_dev->device.devargs,
- pci_dev->id.device_id))
+ if (iavf_dcf_cap_selected(pci_dev->device.devargs))
return 1;
return rte_eth_dev_pci_generic_probe(pci_dev,
RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map);
RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci");
-RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf driver=i40evf");
+RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf");
RTE_LOG_REGISTER_SUFFIX(iavf_logtype_init, init, NOTICE);
RTE_LOG_REGISTER_SUFFIX(iavf_logtype_driver, driver, NOTICE);
#ifdef RTE_ETHDEV_DEBUG_RX
git.droids-corp.org / dpdk.git / blobdiff