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net/sfc: fence off 8 bits in Rx mark for tunnel offload
[dpdk.git] / drivers / net / iavf / iavf_fdir.c
diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c
index e81416d..b63aaca 100644 (file)
--- a/drivers/net/iavf/iavf_fdir.c
+++ b/drivers/net/iavf/iavf_fdir.c
@@ -57,7 +57,7 @@
        IAVF_INSET_IPV6_HOP_LIMIT)
 
 #define IAVF_FDIR_INSET_ETH_IPV6_FRAG_EXT (\
-       IAVF_INSET_IPV6_ID)
+       IAVF_FDIR_INSET_ETH_IPV6 | IAVF_INSET_IPV6_ID)
 
 #define IAVF_FDIR_INSET_ETH_IPV6_UDP (\
        IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
@@ -193,6 +193,62 @@ static struct iavf_pattern_match_item iavf_fdir_pattern[] = {
        {iavf_pattern_eth_ipv4_gtpu_eh_ipv6,     IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
        {iavf_pattern_eth_ipv4_gtpu_eh_ipv6_udp, IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
        {iavf_pattern_eth_ipv4_gtpu_eh_ipv6_tcp, IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu,            IAVF_FDIR_INSET_IPV4_GTPU,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv4,       IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv4_udp,   IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv4_tcp,   IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv6,       IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv6_udp,   IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_ipv6_tcp,   IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu,            IAVF_FDIR_INSET_IPV4_GTPU,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv4,       IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv4_udp,   IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv4_tcp,   IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv6,       IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv6_udp,   IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_ipv6_tcp,   IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu,            IAVF_FDIR_INSET_IPV6_GTPU,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv4,       IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv4_udp,   IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv4_tcp,   IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv6,       IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv6_udp,   IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_ipv6_tcp,   IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu,            IAVF_FDIR_INSET_IPV6_GTPU,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv4,       IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv4_udp,   IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv4_tcp,   IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv6,       IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv6_udp,   IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_ipv6_tcp,   IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh,                 IAVF_FDIR_INSET_IPV4_GTPU_EH,  IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv4,            IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv4_udp,        IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv4_tcp,        IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv6,            IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv6_udp,        IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv4_gtpu_eh_ipv6_tcp,        IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh,                 IAVF_FDIR_INSET_IPV4_GTPU_EH,  IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv4,            IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv4_udp,        IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv4_tcp,        IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv6,            IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv6_udp,        IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv4_gre_ipv6_gtpu_eh_ipv6_tcp,        IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh,                 IAVF_FDIR_INSET_IPV6_GTPU_EH,  IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv4,            IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv4_udp,        IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv4_tcp,        IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv6,            IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv6_udp,        IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv4_gtpu_eh_ipv6_tcp,        IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh,                 IAVF_FDIR_INSET_IPV6_GTPU_EH,  IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv4,            IAVF_FDIR_INSET_GTPU_IPV4,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv4_udp,        IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv4_tcp,        IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv6,            IAVF_FDIR_INSET_GTPU_IPV6,     IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv6_udp,        IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
+       {iavf_pattern_eth_ipv6_gre_ipv6_gtpu_eh_ipv6_tcp,        IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
        {iavf_pattern_eth_ipv6_gtpu,             IAVF_FDIR_INSET_IPV6_GTPU,     IAVF_INSET_NONE},
        {iavf_pattern_eth_ipv6_gtpu_eh,          IAVF_FDIR_INSET_IPV6_GTPU_EH,  IAVF_INSET_NONE},
        {iavf_pattern_eth_ipv4_l2tpv3,           IAVF_FDIR_INSET_L2TPV3OIP,     IAVF_INSET_NONE},
@@ -375,7 +431,7 @@ iavf_fdir_parse_action_qregion(struct iavf_adapter *ad,
                }
        }
 
-       if (rss->queue[rss->queue_num - 1] >= ad->eth_dev->data->nb_rx_queues) {
+       if (rss->queue[rss->queue_num - 1] >= ad->dev_data->nb_rx_queues) {
                rte_flow_error_set(error, EINVAL,
                                RTE_FLOW_ERROR_TYPE_ACTION, act,
                                "Invalid queue region indexes.");
@@ -455,7 +511,7 @@ iavf_fdir_parse_action(struct iavf_adapter *ad,
                        filter_action->act_conf.queue.index = act_q->index;
 
                        if (filter_action->act_conf.queue.index >=
-                               ad->eth_dev->data->nb_rx_queues) {
+                               ad->dev_data->nb_rx_queues) {
                                rte_flow_error_set(error, EINVAL,
                                        RTE_FLOW_ERROR_TYPE_ACTION,
                                        actions, "Invalid queue for FDIR.");
@@ -608,6 +664,7 @@ iavf_fdir_add_fragment_hdr(struct virtchnl_proto_hdrs *hdrs, int layer)
        /* adding dummy fragment header */
        hdr1 = &hdrs->proto_hdr[layer];
        VIRTCHNL_SET_PROTO_HDR_TYPE(hdr1, IPV4_FRAG);
+       hdr1->field_selector = 0;
        hdrs->count = ++layer;
 }
 
@@ -1104,17 +1161,28 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
 
                        if (!gtp_psc_spec)
                                VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
-                       else if ((gtp_psc_mask->qfi) && !(gtp_psc_mask->pdu_type))
+                       else if ((gtp_psc_mask->hdr.qfi) &&
+                               !(gtp_psc_mask->hdr.type))
                                VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
-                       else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_UPLINK)
+                       else if (gtp_psc_spec->hdr.type == IAVF_GTPU_EH_UPLINK)
                                VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_UP);
-                       else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_DWLINK)
+                       else if (gtp_psc_spec->hdr.type == IAVF_GTPU_EH_DWLINK)
                                VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_DWN);
 
                        if (gtp_psc_spec && gtp_psc_mask) {
-                               if (gtp_psc_mask->qfi == UINT8_MAX) {
+                               if (gtp_psc_mask->hdr.qfi == 0x3F) {
                                        input_set |= IAVF_INSET_GTPU_QFI;
-                                       VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_EH, QFI);
+                                       if (!gtp_psc_mask->hdr.type)
+                                               VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+                                                                                GTPU_EH, QFI);
+                                       else if (gtp_psc_spec->hdr.type ==
+                                                               IAVF_GTPU_EH_UPLINK)
+                                               VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+                                                                                GTPU_UP, QFI);
+                                       else if (gtp_psc_spec->hdr.type ==
+                                                               IAVF_GTPU_EH_DWLINK)
+                                               VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr,
+                                                                                GTPU_DWN, QFI);
                                }
 
                                rte_memcpy(hdr->buffer, gtp_psc_spec,
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