bus/fslmc: update MC FW to 10.28

[dpdk.git] / drivers / net / iavf / iavf_rxtx_vec_sse.c

diff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c
index bf87696..ee1e905 100644 (file)
--- a/drivers/net/iavf/iavf_rxtx_vec_sse.c
+++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c
@@ -494,7 +494,7 @@ _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                /* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */
                mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
                /* Read desc statuses backwards to avoid race condition */
-               /* A.1 load 4 pkts desc */
+               /* A.1 load desc[3] */
                descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
                rte_compiler_barrier();
 
@@ -506,9 +506,9 @@ _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);
 #endif
 
+               /* A.1 load desc[2-0] */
                descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
                rte_compiler_barrier();
-               /* B.1 load 2 mbuf point */
                descs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));
                rte_compiler_barrier();
                descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
@@ -590,7 +590,7 @@ _recv_raw_pkts_vec(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                        /* and with mask to extract bits, flipping 1-0 */
                        __m128i eop_bits = _mm_andnot_si128(staterr, eop_check);
                        /* the staterr values are not in order, as the count
-                        * count of dd bits doesn't care. However, for end of
+                        * of dd bits doesn't care. However, for end of
                         * packet tracking, we do care, so shuffle. This also
                         * compresses the 32-bit values to 8-bit
                         */
@@ -755,7 +755,7 @@ _recv_raw_pkts_vec_flex_rxd(struct iavf_rx_queue *rxq,
                /* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */
                mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
                /* Read desc statuses backwards to avoid race condition */
-               /* A.1 load 4 pkts desc */
+               /* A.1 load desc[3] */
                descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
                rte_compiler_barrier();
 
@@ -767,9 +767,9 @@ _recv_raw_pkts_vec_flex_rxd(struct iavf_rx_queue *rxq,
                mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos + 2]);
 #endif
 
+               /* A.1 load desc[2-0] */
                descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
                rte_compiler_barrier();
-               /* B.1 load 2 mbuf point */
                descs[1] = _mm_loadu_si128((__m128i *)(rxdp + 1));
                rte_compiler_barrier();
                descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
@@ -884,7 +884,7 @@ _recv_raw_pkts_vec_flex_rxd(struct iavf_rx_queue *rxq,
                        /* and with mask to extract bits, flipping 1-0 */
                        __m128i eop_bits = _mm_andnot_si128(staterr, eop_check);
                        /* the staterr values are not in order, as the count
-                        * count of dd bits doesn't care. However, for end of
+                        * of dd bits doesn't care. However, for end of
                         * packet tracking, we do care, so shuffle. This also
                         * compresses the 32-bit values to 8-bit
                         */