#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000
#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000
#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000
- /* For SDP: pin id of the SDP */
+ /* For SDP: pin ID of the SDP */
__le32 res_number;
/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */
__le16 status;
};
+/* Configure No-Drop Policy Command (direct 0x0112) */
+struct ice_aqc_config_no_drop_policy {
+ u8 opts;
+#define ICE_AQC_FORCE_NO_DROP BIT(0)
+ u8 rsvd[15];
+};
+
/* Get switch configuration (0x0200) */
struct ice_aqc_get_sw_cfg {
/* Reserved for command and copy of request flags for response */
#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00
+#define ICE_AQC_RES_TYPE_S 0
+#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S)
+
+/* Get Resource Allocation command (indirect 0x0204) */
+struct ice_aqc_get_res_alloc {
+ __le16 resp_elem_num; /* Used in response, reserved in command */
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Resource Allocation Response Buffer per response */
+struct ice_aqc_get_res_resp_elem {
+ __le16 res_type; /* Types defined above cmd 0x0204 */
+ __le16 total_capacity; /* Resources available to all PF's */
+ __le16 total_function; /* Resources allocated for a PF */
+ __le16 total_shared; /* Resources allocated as shared */
+ __le16 total_free; /* Resources un-allocated/not reserved by any PF */
+};
+
+/* Buffer for Get Resource command */
+struct ice_aqc_get_res_resp {
+ /* Number of resource entries to be calculated using
+ * datalen/sizeof(struct ice_aqc_cmd_resp)).
+ * Value of 'datalen' gets updated as part of response.
+ */
+ struct ice_aqc_get_res_resp_elem elem[1];
+};
/* Allocate Resources command (indirect 0x0208)
};
+/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
+struct ice_aqc_get_allocd_res_desc {
+ union {
+ struct {
+ __le16 res; /* Types defined above cmd 0x0204 */
+ __le16 first_desc;
+ __le32 reserved;
+ } cmd;
+ struct {
+ __le16 res;
+ __le16 next_desc;
+ __le16 num_desc;
+ __le16 reserved;
+ } resp;
+ } ops;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_get_allocd_res_desc_resp {
+ struct ice_aqc_res_elem elem[1];
+};
/* Add VSI (indirect 0x0210)
};
+struct ice_aqc_get_vsi_resp {
+ __le16 vsi_num;
+ u8 vf_id;
+ /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values.
+ * These are found above in struct ice_aqc_add_get_update_free_vsi.
+ */
+ u8 vsi_flags;
+ __le16 vsi_used;
+ __le16 vsi_free;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
struct ice_aqc_vsi_props {
__le16 valid_sections;
};
+/* Add/update mirror rule - direct (0x0260) */
+#define ICE_AQC_RULE_ID_VALID_S 7
+#define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S)
+#define ICE_AQC_RULE_ID_S 0
+#define ICE_AQC_RULE_ID_M (0x3F << ICE_AQC_RULE_ID_S)
+
+/* Following defines to be used while processing caller specified mirror list
+ * of VSI indexes.
+ */
+/* Action: Byte.bit (1.7)
+ * 0 = Remove VSI from mirror rule
+ * 1 = Add VSI to mirror rule
+ */
+#define ICE_AQC_RULE_ACT_S 15
+#define ICE_AQC_RULE_ACT_M (0x1 << ICE_AQC_RULE_ACT_S)
+/* Action: 1.2:0.0 = Mirrored VSI */
+#define ICE_AQC_RULE_MIRRORED_VSI_S 0
+#define ICE_AQC_RULE_MIRRORED_VSI_M (0x7FF << ICE_AQC_RULE_MIRRORED_VSI_S)
+
+/* This is to be used by add/update mirror rule Admin Queue command.
+ * In case of add mirror rule - if rule ID is specified as
+ * INVAL_MIRROR_RULE_ID, new rule ID is allocated from shared pool.
+ * If specified rule_id is valid, then it is used. If specified rule_id
+ * is in use then new mirroring rule is added.
+ */
+#define ICE_INVAL_MIRROR_RULE_ID 0xFFFF
+
+struct ice_aqc_add_update_mir_rule {
+ __le16 rule_id;
+
+ __le16 rule_type;
+#define ICE_AQC_RULE_TYPE_S 0
+#define ICE_AQC_RULE_TYPE_M (0x7 << ICE_AQC_RULE_TYPE_S)
+ /* VPORT ingress/egress */
+#define ICE_AQC_RULE_TYPE_VPORT_INGRESS 0x1
+#define ICE_AQC_RULE_TYPE_VPORT_EGRESS 0x2
+ /* Physical port ingress mirroring.
+ * All traffic received by this port
+ */
+#define ICE_AQC_RULE_TYPE_PPORT_INGRESS 0x6
+ /* Physical port egress mirroring. All traffic sent by this port */
+#define ICE_AQC_RULE_TYPE_PPORT_EGRESS 0x7
+
+ /* Number of mirrored entries.
+ * The values are in the command buffer
+ */
+ __le16 num_entries;
+
+ /* Destination VSI */
+ __le16 dest;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Delete mirror rule - direct(0x0261) */
+struct ice_aqc_delete_mir_rule {
+ __le16 rule_id;
+ __le16 rsvd;
+
+ /* Byte.bit: 20.0 = Keep allocation. If set VSI stays part of
+ * the PF allocated resources, otherwise it is returned to the
+ * shared pool
+ */
+#define ICE_AQC_FLAG_KEEP_ALLOCD_S 0
+#define ICE_AQC_FLAG_KEEP_ALLOCD_M (0x1 << ICE_AQC_FLAG_KEEP_ALLOCD_S)
+ __le16 flags;
+
+ u8 reserved[10];
+};
+
+/* Set/Get storm config - (direct 0x0280, 0x0281) */
+/* This structure holds get storm configuration response and same structure
+ * is used to perform set_storm_cfg
+ */
+struct ice_aqc_storm_cfg {
+ __le32 bcast_thresh_size;
+ __le32 mcast_thresh_size;
+ /* Bit 18:0 - Traffic upper threshold size
+ * Bit 31:19 - Reserved
+ */
+#define ICE_AQ_THRESHOLD_S 0
+#define ICE_AQ_THRESHOLD_M (0x7FFFF << ICE_AQ_THRESHOLD_S)
+
+ __le32 storm_ctrl_ctrl;
+ /* Bit 0: MDIPW - Drop Multicast packets in previous window
+ * Bit 1: MDICW - Drop multicast packets in current window
+ * Bit 2: BDIPW - Drop broadcast packets in previous window
+ * Bit 3: BDICW - Drop broadcast packets in current window
+ */
+#define ICE_AQ_STORM_CTRL_MDIPW_DROP_MULTICAST BIT(0)
+#define ICE_AQ_STORM_CTRL_MDICW_DROP_MULTICAST BIT(1)
+#define ICE_AQ_STORM_CTRL_BDIPW_DROP_MULTICAST BIT(2)
+#define ICE_AQ_STORM_CTRL_BDICW_DROP_MULTICAST BIT(3)
+ /* Bit 7:5 : Reserved */
+ /* Bit 27:8 : Interval - BSC/MSC Time-interval specification: The
+ * interval size for applying ingress broadcast or multicast storm
+ * control.
+ */
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S 8
+#define ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_M \
+ (0xFFFFF << ICE_AQ_STORM_BSC_MSC_TIME_INTERVAL_S)
+ __le32 reserved;
+};
+
#define ICE_MAX_NUM_RECIPES 64
-
/* Rate limiting profile for
* Add RL profile (indirect 0x0410)
* Query RL profile (indirect 0x0411)
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
};
+/* Set MAC Config command data structure (direct 0x0603) */
+struct ice_aqc_set_mac_cfg {
+ __le16 max_frame_size;
+ u8 params;
+#define ICE_AQ_SET_MAC_PACE_S 3
+#define ICE_AQ_SET_MAC_PACE_M (0xF << ICE_AQ_SET_MAC_PACE_S)
+#define ICE_AQ_SET_MAC_PACE_TYPE_M BIT(7)
+#define ICE_AQ_SET_MAC_PACE_TYPE_RATE 0
+#define ICE_AQ_SET_MAC_PACE_TYPE_FIXED ICE_AQ_SET_MAC_PACE_TYPE_M
+ u8 tx_tmr_priority;
+ __le16 tx_tmr_value;
+ __le16 fc_refresh_threshold;
+ u8 drop_opts;
+#define ICE_AQ_SET_MAC_AUTO_DROP_MASK BIT(0)
+#define ICE_AQ_SET_MAC_AUTO_DROP_NONE 0
+#define ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS BIT(0)
+ u8 reserved[7];
+};
+
/* Restart AN command data structure (direct 0x0605)
* Also used for response, with only the lport_num field present.
u8 ext_info;
#define ICE_AQ_LINK_PHY_TEMP_ALARM BIT(0)
#define ICE_AQ_LINK_EXCESSIVE_ERRORS BIT(1) /* Excessive Link Errors */
- /* Port TX Suspended */
+ /* Port Tx Suspended */
#define ICE_AQ_LINK_TX_S 2
#define ICE_AQ_LINK_TX_M (0x03 << ICE_AQ_LINK_TX_S)
#define ICE_AQ_LINK_TX_ACTIVE 0
-/* Add TX LAN Queues (indirect 0x0C30) */
+/* Add Tx LAN Queues (indirect 0x0C30) */
struct ice_aqc_add_txqs {
u8 num_qgrps;
u8 reserved[3];
};
-/* This is the descriptor of each queue entry for the Add TX LAN Queues
+/* This is the descriptor of each queue entry for the Add Tx LAN Queues
* command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp.
*/
struct ice_aqc_add_txqs_perq {
};
-/* The format of the command buffer for Add TX LAN Queues (0x0C30)
+/* The format of the command buffer for Add Tx LAN Queues (0x0C30)
* is an array of the following structs. Please note that the length of
* each struct ice_aqc_add_tx_qgrp is variable due
* to the variable number of queues in each group!
};
-/* Disable TX LAN Queues (indirect 0x0C31) */
+/* Disable Tx LAN Queues (indirect 0x0C31) */
struct ice_aqc_dis_txqs {
u8 cmd_type;
#define ICE_AQC_Q_DIS_CMD_S 0
};
-/* The buffer for Disable TX LAN Queues (indirect 0x0C31)
+/* The buffer for Disable Tx LAN Queues (indirect 0x0C31)
* contains the following structures, arrayed one after the
* other.
* Note: Since the q_id is 16 bits wide, if the
};
-/* TX LAN Queues Cleanup Event (0x0C31) */
+/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
__le16 caller_opc;
__le16 cmd_tag;
};
-/* Move / Reconfigure TX Queues (indirect 0x0C32) */
+/* Move / Reconfigure Tx Queues (indirect 0x0C32) */
struct ice_aqc_move_txqs {
u8 cmd_type;
#define ICE_AQC_Q_CMD_TYPE_S 0
};
-/* This is the descriptor of each queue entry for the move TX LAN Queues
+/* This is the descriptor of each queue entry for the move Tx LAN Queues
* command (0x0C32).
*/
struct ice_aqc_move_txqs_elem {
+/* Download Package (indirect 0x0C40) */
+/* Also used for Update Package (indirect 0x0C42) */
+struct ice_aqc_download_pkg {
+ u8 flags;
+#define ICE_AQC_DOWNLOAD_PKG_LAST_BUF 0x01
+ u8 reserved[3];
+ __le32 reserved1;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+struct ice_aqc_download_pkg_resp {
+ __le32 error_offset;
+ __le32 error_info;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Package Info List (indirect 0x0C43) */
+struct ice_aqc_get_pkg_info_list {
+ __le32 reserved1;
+ __le32 reserved2;
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Version format for packages */
+struct ice_pkg_ver {
+ u8 major;
+ u8 minor;
+ u8 update;
+ u8 draft;
+};
+
+#define ICE_PKG_NAME_SIZE 32
+
+struct ice_aqc_get_pkg_info {
+ struct ice_pkg_ver ver;
+ char name[ICE_PKG_NAME_SIZE];
+ u8 is_in_nvm;
+ u8 is_active;
+ u8 is_active_at_boot;
+ u8 is_modified;
+};
+
+/* Get Package Info List response buffer format (0x0C43) */
+struct ice_aqc_get_pkg_info_resp {
+ __le32 count;
+ struct ice_aqc_get_pkg_info pkg_info[1];
+};
+
struct ice_aqc_manage_mac_read mac_read;
struct ice_aqc_manage_mac_write mac_write;
struct ice_aqc_clear_pxe clear_pxe;
+ struct ice_aqc_config_no_drop_policy no_drop;
+ struct ice_aqc_add_update_mir_rule add_update_rule;
+ struct ice_aqc_delete_mir_rule del_rule;
struct ice_aqc_list_caps get_cap;
struct ice_aqc_get_phy_caps get_phy;
struct ice_aqc_set_phy_cfg set_phy;
struct ice_aqc_set_port_id_led set_port_id_led;
struct ice_aqc_get_sw_cfg get_sw_conf;
struct ice_aqc_sw_rules sw_rules;
+ struct ice_aqc_storm_cfg storm_conf;
struct ice_aqc_get_topo get_topo;
struct ice_aqc_sched_elem_cmd sched_elem_cmd;
struct ice_aqc_query_txsched_res query_sched_res;
struct ice_aqc_query_node_to_root query_node_to_root;
struct ice_aqc_cfg_l2_node_cgd cfg_l2_node_cgd;
struct ice_aqc_rl_profile rl_profile;
-
struct ice_aqc_nvm nvm;
struct ice_aqc_nvm_cfg nvm_cfg;
struct ice_aqc_nvm_checksum nvm_checksum;
struct ice_aqc_txqs_cleanup txqs_cleanup;
struct ice_aqc_add_get_update_free_vsi vsi_cmd;
struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;
+ struct ice_aqc_get_vsi_resp get_vsi_resp;
+ struct ice_aqc_download_pkg download_pkg;
+ struct ice_aqc_get_pkg_info_list get_pkg_info_list;
struct ice_aqc_fw_logging fw_logging;
struct ice_aqc_get_clear_fw_log get_clear_fw_log;
struct ice_aqc_set_mac_lb set_mac_lb;
struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;
+ struct ice_aqc_get_res_alloc get_res;
+ struct ice_aqc_get_allocd_res_desc get_res_desc;
+ struct ice_aqc_set_mac_cfg set_mac_cfg;
struct ice_aqc_set_event_mask set_event_mask;
struct ice_aqc_get_link_status get_link_status;
} params;
ice_aqc_opc_get_vsi_params = 0x0212,
ice_aqc_opc_free_vsi = 0x0213,
+ /* Mirroring rules - add/update, delete */
+ ice_aqc_opc_add_update_mir_rule = 0x0260,
+ ice_aqc_opc_del_mir_rule = 0x0261,
+
+ /* storm configuration */
+ ice_aqc_opc_set_storm_cfg = 0x0280,
+ ice_aqc_opc_get_storm_cfg = 0x0281,
/* switch rules population commands */
ice_aqc_opc_move_sched_elems = 0x0408,
ice_aqc_opc_suspend_sched_elems = 0x0409,
ice_aqc_opc_resume_sched_elems = 0x040A,
- ice_aqc_opc_suspend_sched_traffic = 0x040B,
- ice_aqc_opc_resume_sched_traffic = 0x040C,
ice_aqc_opc_delete_sched_elems = 0x040F,
ice_aqc_opc_add_rl_profiles = 0x0410,
ice_aqc_opc_query_rl_profiles = 0x0411,
ice_aqc_opc_get_rss_key = 0x0B04,
ice_aqc_opc_get_rss_lut = 0x0B05,
- /* TX queue handling commands/events */
+ /* Tx queue handling commands/events */
ice_aqc_opc_add_txqs = 0x0C30,
ice_aqc_opc_dis_txqs = 0x0C31,
ice_aqc_opc_txqs_cleanup = 0x0C31,
ice_aqc_opc_move_recfg_txqs = 0x0C32,
+ /* package commands */
+ ice_aqc_opc_download_pkg = 0x0C40,
+ ice_aqc_opc_upload_section = 0x0C41,
+ ice_aqc_opc_update_pkg = 0x0C42,
+ ice_aqc_opc_get_pkg_info_list = 0x0C43,
git.droids-corp.org / dpdk.git / blobdiff