#define ICE_AQC_CAPS_MSIX 0x0043
#define ICE_AQC_CAPS_FD 0x0045
#define ICE_AQC_CAPS_MAX_MTU 0x0047
+#define ICE_AQC_CAPS_IWARP 0x0051
+#define ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE 0x0076
+#define ICE_AQC_CAPS_NVM_MGMT 0x0080
u8 major_ver;
u8 minor_ver;
#define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15)
};
-/* The response buffer is as follows. Note that the length of the
- * elements array varies with the length of the command response.
- */
-struct ice_aqc_get_sw_cfg_resp {
- struct ice_aqc_get_sw_cfg_resp_elem elements[1];
-};
-
/* These resource type defines are used for all switch resource
* commands where a resource type is required, such as:
* Get Resource Allocation command (indirect 0x0204)
__le16 total_free; /* Resources un-allocated/not reserved by any PF */
};
-/* Buffer for Get Resource command */
-struct ice_aqc_get_res_resp {
- /* Number of resource entries to be calculated using
- * datalen/sizeof(struct ice_aqc_cmd_resp)).
- * Value of 'datalen' gets updated as part of response.
- */
- struct ice_aqc_get_res_resp_elem elem[1];
-};
-
/* Allocate Resources command (indirect 0x0208)
* Free Resources command (indirect 0x0209)
*/
#define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M \
(0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S)
__le16 num_elems;
- struct ice_aqc_res_elem elem[1];
+ struct ice_aqc_res_elem elem[STRUCT_HACK_VAR_LEN];
};
/* Get Allocated Resource Descriptors Command (indirect 0x020A) */
__le32 addr_low;
};
-struct ice_aqc_get_allocd_res_desc_resp {
- struct ice_aqc_res_elem elem[1];
-};
-
/* Add VSI (indirect 0x0210)
* Update VSI (indirect 0x0211)
* Get VSI (indirect 0x0212)
u8 q_opt_reserved[3];
/* outer up section */
__le32 outer_up_table; /* same structure and defines as ingress tbl */
- /* acl section */
+ /* ACL section */
__le16 acl_def_act;
#define ICE_AQ_VSI_ACL_DEF_RX_PROF_S 0
#define ICE_AQ_VSI_ACL_DEF_RX_PROF_M (0xF << ICE_AQ_VSI_ACL_DEF_RX_PROF_S)
#define ICE_MAX_NUM_RECIPES 64
-/* Add/Get Recipe (indirect 0x0290/0x0292)*/
+/* Add/Get Recipe (indirect 0x0290/0x0292) */
struct ice_aqc_add_get_recipe {
__le16 num_sub_recipes; /* Input in Add cmd, Output in Get cmd */
__le16 return_index; /* Input, used for Get cmd only */
u8 rsvd2[20];
};
-/* This struct contains a number of entries as per the
- * num_sub_recipes in the command
- */
-struct ice_aqc_add_get_recipe_data {
- struct ice_aqc_recipe_data_elem recipe[1];
-};
-
/* Set/Get Recipes to Profile Association (direct 0x0291/0x0293) */
struct ice_aqc_recipe_to_profile {
__le16 profile_id;
__le32 addr_low;
};
-#pragma pack(1)
/* Add/Update/Get/Remove lookup Rx/Tx command/response entry
* This structures describes the lookup rules and associated actions. "index"
* is returned as part of a response to a successful Add command, and can be
* lookup-type
*/
__le16 hdr_len;
- u8 hdr[1];
+ u8 hdr[STRUCT_HACK_VAR_LEN];
};
-#pragma pack()
/* Add/Update/Remove large action command/response entry
* "index" is returned as part of a response to a successful Add command, and
struct ice_sw_rule_lg_act {
__le16 index; /* Index in large action table */
__le16 size;
- __le32 act[1]; /* array of size for actions */
/* Max number of large actions */
#define ICE_MAX_LG_ACT 4
/* Bit 0:1 - Action type */
#define ICE_LG_ACT_STAT_COUNT 0x7
#define ICE_LG_ACT_STAT_COUNT_S 3
#define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S)
+ __le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */
};
/* Add/Update/Remove VSI list command/response entry
struct ice_sw_rule_vsi_list {
__le16 index; /* Index of VSI/Prune list */
__le16 number_vsi;
- __le16 vsi[1]; /* Array of number_vsi VSI numbers */
+ __le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */
};
#pragma pack(1)
__le32 addr_low;
};
-/* This is the buffer for:
- * Suspend Nodes (indirect 0x0409)
- * Resume Nodes (indirect 0x040A)
- */
-struct ice_aqc_suspend_resume_elem {
- __le32 teid[1];
-};
-
struct ice_aqc_txsched_move_grp_info_hdr {
__le32 src_parent_teid;
__le32 dest_parent_teid;
struct ice_aqc_move_elem {
struct ice_aqc_txsched_move_grp_info_hdr hdr;
- __le32 teid[1];
+ __le32 teid[STRUCT_HACK_VAR_LEN];
};
struct ice_aqc_elem_info_bw {
struct ice_aqc_add_elem {
struct ice_aqc_txsched_topo_grp_info_hdr hdr;
- struct ice_aqc_txsched_elem_data generic[1];
-};
-
-struct ice_aqc_conf_elem {
- struct ice_aqc_txsched_elem_data generic[1];
-};
-
-struct ice_aqc_get_elem {
- struct ice_aqc_txsched_elem_data generic[1];
+ struct ice_aqc_txsched_elem_data generic[STRUCT_HACK_VAR_LEN];
};
struct ice_aqc_get_topo_elem {
struct ice_aqc_delete_elem {
struct ice_aqc_txsched_topo_grp_info_hdr hdr;
- __le32 teid[1];
+ __le32 teid[STRUCT_HACK_VAR_LEN];
};
/* Query Port ETS (indirect 0x040E)
__le16 rl_encode;
};
-struct ice_aqc_rl_profile_generic_elem {
- struct ice_aqc_rl_profile_elem generic[1];
-};
-
/* Configure L2 Node CGD (indirect 0x0414)
* This indirect command allows configuring a congestion domain for given L2
* node TEIDs in the scheduler topology.
u8 reserved[3];
};
-struct ice_aqc_cfg_l2_node_cgd_data {
- struct ice_aqc_cfg_l2_node_cgd_elem elem[1];
-};
-
/* Query Scheduler Resource Allocation (indirect 0x0412)
* This indirect command retrieves the scheduler resources allocated by
* EMP Firmware to the given PF.
#define ICE_PHY_TYPE_HIGH_100G_CAUI2 BIT_ULL(2)
#define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC BIT_ULL(3)
#define ICE_PHY_TYPE_HIGH_100G_AUI2 BIT_ULL(4)
-#define ICE_PHY_TYPE_HIGH_MAX_INDEX 19
+#define ICE_PHY_TYPE_HIGH_MAX_INDEX 5
struct ice_aqc_get_phy_caps_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
#define ICE_AQC_MOD_TYPE_BYTE0_SFP_PLUS 0xA0
#define ICE_AQC_MOD_TYPE_BYTE0_QSFP_PLUS 0x80
+#define ICE_AQC_MOD_TYPE_IDENT 1
#define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE BIT(0)
#define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE BIT(1)
#define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR BIT(4)
#define ICE_AQC_NVM_REVERT_LAST_ACTIV BIT(6) /* Write Activate only */
#define ICE_AQC_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3)
#define ICE_AQC_NVM_FLASH_ONLY BIT(7)
+#define ICE_AQC_NVM_POR_FLAG 0 /* Used by NVM Write completion on ARQ */
+#define ICE_AQC_NVM_PERST_FLAG 1
+#define ICE_AQC_NVM_EMPR_FLAG 2
__le16 module_typeid;
__le16 length;
#define ICE_AQC_NVM_ERASE_LEN 0xFFFF
u8 reserved[15];
};
+/* LLDP Filter Control (direct 0x0A0A) */
+struct ice_aqc_lldp_filter_ctrl {
+ u8 cmd_flags;
+#define ICE_AQC_LLDP_FILTER_ACTION_M MAKEMASK(3, 0)
+#define ICE_AQC_LLDP_FILTER_ACTION_ADD 0x0
+#define ICE_AQC_LLDP_FILTER_ACTION_DELETE 0x1
+#define ICE_AQC_LLDP_FILTER_ACTION_UPDATE 0x2
+ u8 reserved1;
+ __le16 vsi_num;
+ u8 reserved2[12];
+};
+
/* Get/Set RSS key (indirect 0x0B04/0x0B02) */
struct ice_aqc_get_set_rss_key {
#define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15)
struct ice_aqc_get_set_rss_lut {
#define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15)
#define ICE_AQC_GSET_RSS_LUT_VSI_ID_S 0
-#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M (0x1FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
+#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M (0x3FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
__le16 vsi_id;
#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S 0
#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M \
u8 reserved[12];
};
-/* ACL - allocate (indirect 0x0C10) table */
+/* Allocate ACL table (indirect 0x0C10) */
#define ICE_AQC_ACL_KEY_WIDTH 40
#define ICE_AQC_ACL_KEY_WIDTH_BYTES 5
#define ICE_AQC_ACL_TCAM_DEPTH 512
__le16 alloc_ids[ICE_AQC_MAX_CONCURRENT_ACL_TBL];
};
-/* ACL - deallocate (indirect 0x0C11) table
- * ACL - allocate (indirect 0x0C12) action-pair
- * ACL - deallocate (indirect 0x0C13) action-pair
+/* Deallocate ACL table (indirect 0x0C11)
+ * Allocate ACL action-pair (indirect 0x0C12)
+ * Deallocate ACL action-pair (indirect 0x0C13)
*/
/* Following structure is common and used in case of deallocation
u8 act_mem[ICE_AQC_MAX_ACTION_MEMORIES];
};
-/* ACL - allocate (indirect 0x0C14) scenario. This command doesn't have separate
+/* Allocate ACL scenario (indirect 0x0C14). This command doesn't have separate
* response buffer since original command buffer gets updated with
* 'scen_id' in case of success
*/
__le32 addr_low;
};
-/* ACL - de-allocate (direct 0x0C15) scenario. This command doesn't need
+/* De-allocate ACL scenario (direct 0x0C15). This command doesn't need
* separate response buffer since nothing to be returned as a response
* except status.
*/
u8 reserved[14];
};
-/* ACL - update (direct 0x0C1B) scenario */
-/* ACL - query (direct 0x0C23) scenario */
+/* Update ACL scenario (direct 0x0C1B)
+ * Query ACL scenario (direct 0x0C23)
+ */
struct ice_aqc_acl_update_query_scen {
__le16 scen_id;
u8 reserved[6];
*/
struct ice_aqc_acl_scen {
struct {
- /* Byte [x] selection for the TCAM key. This value must be set
+ /* Byte [x] selection for the TCAM key. This value must be
* set to 0x0 for unusued TCAM.
* Only Bit 6..0 is used in each byte and MSB is reserved
*/
u8 act_mem_cfg[ICE_AQC_MAX_ACTION_MEMORIES];
};
-/* ACL - allocate (indirect 0x0C16) counters */
+/* Allocate ACL counters (indirect 0x0C16) */
struct ice_aqc_acl_alloc_counters {
/* Amount of contiguous counters requested. Min value is 1 and
* max value is 255
} ops;
};
-/* ACL - de-allocate (direct 0x0C17) counters */
+/* De-allocate ACL counters (direct 0x0C17) */
struct ice_aqc_acl_dealloc_counters {
/* first counter being released */
__le16 first_counter;
u8 reserved[10];
};
-/* ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+/* De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
* resources allocated for it using a single command
*/
struct ice_aqc_acl_dealloc_res {
u8 reserved[16];
};
-/* ACL - program actionpair (indirect 0x0C1C) */
-/* ACL - query actionpair (indirect 0x0C25) */
+/* Program ACL actionpair (indirect 0x0C1C)
+ * Query ACL actionpair (indirect 0x0C25)
+ */
struct ice_aqc_acl_actpair {
/* action mem index to program/update */
u8 act_mem_index;
u8 pf_scenario_num[ICE_AQC_ACL_PROF_PF_SCEN_NUM_ELEMS];
};
-/* ACL - program ACL profile extraction (indirect 0x0C1D) */
-/* ACL - program ACL profile ranges (indirect 0x0C1E) */
-/* ACL - query ACL profile (indirect 0x0C21) */
-/* ACL - query ACL profile ranges (indirect 0x0C22) */
+/* Program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile ranges (indirect 0x0C1E)
+ * Query ACL profile (indirect 0x0C21)
+ * Query ACL profile ranges (indirect 0x0C22)
+ */
struct ice_aqc_acl_profile {
u8 profile_id; /* Programmed/Updated profile ID */
u8 reserved[7];
struct ice_acl_rng_data checker_cfg[ICE_AQC_ACL_PROF_RANGES_NUM_CFG];
};
-/* ACL - program ACL entry (indirect 0x0C20) */
-/* ACL - query ACL entry (indirect 0x0C24) */
+/* Program ACL entry (indirect 0x0C20)
+ * Query ACL entry (indirect 0x0C24)
+ */
struct ice_aqc_acl_entry {
u8 tcam_index; /* Updated TCAM block index */
u8 reserved;
} entry_key, entry_key_invert;
};
-/* ACL - query ACL counter (direct 0x0C27) */
+/* Query ACL counter (direct 0x0C27) */
struct ice_aqc_acl_query_counter {
/* Queried counter index */
__le16 counter_index;
__le32 parent_teid;
u8 num_txqs;
u8 rsvd[3];
- struct ice_aqc_add_txqs_perq txqs[1];
+ struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
};
/* Disable Tx LAN Queues (indirect 0x0C31) */
* added before the start of the next group, to allow correct
* alignment of the parent_teid field.
*/
+#pragma pack(1)
struct ice_aqc_dis_txq_item {
__le32 parent_teid;
u8 num_qs;
u8 rsvd;
/* The length of the q_id array varies according to num_qs */
- __le16 q_id[1];
- /* This only applies from F8 onward */
#define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S 15
#define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_LAN_Q \
(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
#define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET \
(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
+ __le16 q_id[STRUCT_HACK_VAR_LEN];
};
-struct ice_aqc_dis_txq {
- struct ice_aqc_dis_txq_item qgrps[1];
-};
+#pragma pack()
/* Tx LAN Queues Cleanup Event (0x0C31) */
struct ice_aqc_txqs_cleanup {
struct ice_aqc_move_txqs_data {
__le32 src_teid;
__le32 dest_teid;
- struct ice_aqc_move_txqs_elem txqs[1];
+ struct ice_aqc_move_txqs_elem txqs[STRUCT_HACK_VAR_LEN];
};
/* Download Package (indirect 0x0C40) */
-/* Also used for Update Package (indirect 0x0C42) */
+/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */
struct ice_aqc_download_pkg {
u8 flags;
#define ICE_AQC_DOWNLOAD_PKG_LAST_BUF 0x01
};
#define ICE_PKG_NAME_SIZE 32
+#define ICE_SEG_ID_SIZE 28
#define ICE_SEG_NAME_SIZE 28
struct ice_aqc_get_pkg_info {
/* Get Package Info List response buffer format (0x0C43) */
struct ice_aqc_get_pkg_info_resp {
__le32 count;
- struct ice_aqc_get_pkg_info pkg_info[1];
+ struct ice_aqc_get_pkg_info pkg_info[STRUCT_HACK_VAR_LEN];
};
/* Driver Shared Parameters (direct, 0x0C90) */
u8 reserved[8];
};
+/* Set Health Status (direct 0xFF20) */
+struct ice_aqc_set_health_status_config {
+ u8 event_source;
+#define ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK BIT(0)
+#define ICE_AQC_HEALTH_STATUS_SET_ALL_PF_MASK BIT(1)
+#define ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK BIT(2)
+ u8 reserved[15];
+};
+
+/* Get Health Status codes (indirect 0xFF21) */
+struct ice_aqc_get_supported_health_status_codes {
+ __le16 health_code_count;
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Health Status (indirect 0xFF22) */
+struct ice_aqc_get_health_status {
+ __le16 health_status_count;
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Health Status event buffer entry, (0xFF22)
+ * repeated per reported health status
+ */
+struct ice_aqc_health_status_elem {
+ __le16 health_status_code;
+ __le16 event_source;
+#define ICE_AQC_HEALTH_STATUS_PF (0x1)
+#define ICE_AQC_HEALTH_STATUS_PORT (0x2)
+#define ICE_AQC_HEALTH_STATUS_GLOBAL (0x3)
+ __le32 internal_data1;
+#define ICE_AQC_HEALTH_STATUS_UNDEFINED_DATA (0xDEADBEEF)
+ __le32 internal_data2;
+};
+
+/* Clear Health Status (direct 0xFF23) */
+struct ice_aqc_clear_health_status {
+ __le32 reserved[4];
+};
+
/**
* struct ice_aq_desc - Admin Queue (AQ) descriptor
* @flags: ICE_AQ_FLAG_* flags
struct ice_aqc_lldp_start lldp_start;
struct ice_aqc_lldp_set_local_mib lldp_set_mib;
struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
+ struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;
struct ice_aqc_get_set_rss_lut get_set_rss_lut;
struct ice_aqc_get_set_rss_key get_set_rss_key;
struct ice_aqc_clear_fd_table clear_fd_table;
struct ice_aqc_get_link_status get_link_status;
struct ice_aqc_event_lan_overflow lan_overflow;
struct ice_aqc_get_link_topo get_link_topo;
+ struct ice_aqc_set_health_status_config
+ set_health_status_config;
+ struct ice_aqc_get_supported_health_status_codes
+ get_supported_health_status_codes;
+ struct ice_aqc_get_health_status get_health_status;
+ struct ice_aqc_clear_health_status clear_health_status;
} params;
};
ice_aqc_opc_get_cee_dcb_cfg = 0x0A07,
ice_aqc_opc_lldp_set_local_mib = 0x0A08,
ice_aqc_opc_lldp_stop_start_specific_agent = 0x0A09,
+ ice_aqc_opc_lldp_filter_ctrl = 0x0A0A,
/* RSS commands */
ice_aqc_opc_set_rss_key = 0x0B02,
/* Standalone Commands/Events */
ice_aqc_opc_event_lan_overflow = 0x1001,
+
+ /* SystemDiagnostic commands */
+ ice_aqc_opc_set_health_status_config = 0xFF20,
+ ice_aqc_opc_get_supported_health_status_codes = 0xFF21,
+ ice_aqc_opc_get_health_status = 0xFF22,
+ ice_aqc_opc_clear_health_status = 0xFF23
};
#endif /* _ICE_ADMINQ_CMD_H_ */
git.droids-corp.org / dpdk.git / blobdiff