net/ice/base: give time for package download after PF reset
[dpdk.git] / drivers / net / ice / base / ice_common.c
index e266ba5..a617643 100644 (file)
@@ -747,7 +747,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
        /* Initialize max burst size */
        if (!hw->max_burst_size)
                ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);
-
        status = ice_init_fltr_mgmt_struct(hw);
        if (status)
                goto err_unroll_sched;
@@ -913,7 +912,12 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
 
        wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));
 
-       for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
+       /* Wait for the PFR to complete. The wait time is the global config lock
+        * timeout plus the PFR timeout which will account for a possible reset
+        * that is occurring during a download package operation.
+        */
+       for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT +
+            ICE_PF_RESET_WAIT_COUNT; cnt++) {
                reg = rd32(hw, PFGEN_CTRL);
                if (!(reg & PFGEN_CTRL_PFSWR_M))
                        break;
@@ -1901,6 +1905,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
                        }
                        if (func_p) {
                                u32 reg_val, val;
+
                                if (hw->dcf_enabled)
                                        break;
                                reg_val = rd32(hw, GLQF_FD_SIZE);
@@ -2611,7 +2616,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 
        ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg);
 
-       /* Configure the set phy data */
+       /* Configure the set PHY data */
        status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode);
        if (status) {
                if (status != ICE_ERR_BAD_PTR)
@@ -2762,6 +2767,9 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
        if (status)
                goto out;
 
+       cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC);
+       cfg->link_fec_opt = pcaps->link_fec_options;
+
        switch (fec) {
        case ICE_FEC_BASER:
                /* Clear RS bits, and AND BASE-R ability