net/ice/base: add method to disable FDIR swap option

[dpdk.git] / drivers / net / ice / base / ice_common.c

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 641859f..ae55beb 100644 (file)
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -208,8 +208,21 @@ bool ice_is_e810(struct ice_hw *hw)
  */
 bool ice_is_e810t(struct ice_hw *hw)
 {
-       return (hw->device_id == ICE_DEV_ID_E810C_SFP &&
-               hw->subsystem_device_id == ICE_SUBDEV_ID_E810T);
+       switch (hw->device_id) {
+       case ICE_DEV_ID_E810C_SFP:
+               if (hw->subsystem_device_id == ICE_SUBDEV_ID_E810T ||
+                   hw->subsystem_device_id == ICE_SUBDEV_ID_E810T2)
+                       return true;
+               break;
+       case ICE_DEV_ID_E810C_QSFP:
+               if (hw->subsystem_device_id == ICE_SUBDEV_ID_E810T2)
+                       return true;
+               break;
+       default:
+               break;
+       }
+
+       return false;
 }
 
 /**
@@ -1344,6 +1357,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
        ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx,             2,      166),
        ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx,        3,      168),
        ICE_CTX_STORE(ice_tlan_ctx, int_q_state,                122,    171),
+       ICE_CTX_STORE(ice_tlan_ctx, gsc_ena,                    1,      172),
        { 0 }
 };
 
@@ -2535,6 +2549,23 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
        ice_recalc_port_limited_caps(hw, &func_p->common_cap);
 }
 
+/**
+ * ice_func_id_to_logical_id - map from function id to logical pf id
+ * @active_function_bitmap: active function bitmap
+ * @pf_id: function number of device
+ */
+static int ice_func_id_to_logical_id(u32 active_function_bitmap, u8 pf_id)
+{
+       u8 logical_id = 0;
+       u8 i;
+
+       for (i = 0; i < pf_id; i++)
+               if (active_function_bitmap & BIT(i))
+                       logical_id++;
+
+       return logical_id;
+}
+
 /**
  * ice_parse_valid_functions_cap - Parse ICE_AQC_CAPS_VALID_FUNCTIONS caps
  * @hw: pointer to the HW struct
@@ -2552,6 +2583,8 @@ ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
        dev_p->num_funcs = ice_hweight32(number);
        ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n",
                  dev_p->num_funcs);
+
+       hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id);
 }
 
 /**
@@ -2979,6 +3012,28 @@ ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
        return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
+/**
+ * ice_is_100m_speed_supported
+ * @hw: pointer to the HW struct
+ *
+ * returns true if 100M speeds are supported by the device,
+ * false otherwise.
+ */
+bool ice_is_100m_speed_supported(struct ice_hw *hw)
+{
+       switch (hw->device_id) {
+       case ICE_DEV_ID_E822C_10G_BASE_T:
+       case ICE_DEV_ID_E822C_SGMII:
+       case ICE_DEV_ID_E822L_10G_BASE_T:
+       case ICE_DEV_ID_E822L_SGMII:
+       case ICE_DEV_ID_E823L_10G_BASE_T:
+       case ICE_DEV_ID_E823L_1GBE:
+               return true;
+       default:
+               return false;
+       }
+}
+
 /**
  * ice_get_link_speed_based_on_phy_type - returns link speed
  * @phy_type_low: lower part of phy_type
@@ -5439,6 +5494,81 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
        return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
+/**
+ * ice_aq_set_driver_param - Set driver parameter to share via firmware
+ * @hw: pointer to the HW struct
+ * @idx: parameter index to set
+ * @value: the value to set the parameter to
+ * @cd: pointer to command details structure or NULL
+ *
+ * Set the value of one of the software defined parameters. All PFs connected
+ * to this device can read the value using ice_aq_get_driver_param.
+ *
+ * Note that firmware provides no synchronization or locking, and will not
+ * save the parameter value during a device reset. It is expected that
+ * a single PF will write the parameter value, while all other PFs will only
+ * read it.
+ */
+enum ice_status
+ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+                       u32 value, struct ice_sq_cd *cd)
+{
+       struct ice_aqc_driver_shared_params *cmd;
+       struct ice_aq_desc desc;
+
+       if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
+               return ICE_ERR_OUT_OF_RANGE;
+
+       cmd = &desc.params.drv_shared_params;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
+
+       cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_SET;
+       cmd->param_indx = idx;
+       cmd->param_val = CPU_TO_LE32(value);
+
+       return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_get_driver_param - Get driver parameter shared via firmware
+ * @hw: pointer to the HW struct
+ * @idx: parameter index to set
+ * @value: storage to return the shared parameter
+ * @cd: pointer to command details structure or NULL
+ *
+ * Get the value of one of the software defined parameters.
+ *
+ * Note that firmware provides no synchronization or locking. It is expected
+ * that only a single PF will write a given parameter.
+ */
+enum ice_status
+ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
+                       u32 *value, struct ice_sq_cd *cd)
+{
+       struct ice_aqc_driver_shared_params *cmd;
+       struct ice_aq_desc desc;
+       enum ice_status status;
+
+       if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
+               return ICE_ERR_OUT_OF_RANGE;
+
+       cmd = &desc.params.drv_shared_params;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
+
+       cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_GET;
+       cmd->param_indx = idx;
+
+       status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+       if (status)
+               return status;
+
+       *value = LE32_TO_CPU(cmd->param_val);
+
+       return ICE_SUCCESS;
+}
+
 /**
  * ice_aq_set_gpio
  * @hw: pointer to the hw struct