net/i40e: fix parsing packet type for NEON

[dpdk.git] / drivers / net / ice / base / ice_controlq.h

diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index f47fd43..0d54e71 100644 (file)
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2020
+ * Copyright(c) 2001-2021 Intel Corporation
  */
 
 #ifndef _ICE_CONTROLQ_H_
@@ -15,8 +15,8 @@
        (&(((struct ice_aq_desc *)((R).desc_buf.va))[i]))
 
 #define ICE_CTL_Q_DESC_UNUSED(R) \
-       (u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
-             (R)->next_to_clean - (R)->next_to_use - 1)
+       ((u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
+              (R)->next_to_clean - (R)->next_to_use - 1))
 
 /* Defines that help manage the driver vs FW API checks.
  * Take a look at ice_aq_ver_check in ice_controlq.c for actual usage.
@@ -32,8 +32,8 @@ enum ice_ctl_q {
        ICE_CTL_Q_MAILBOX,
 };
 
-/* Control Queue timeout settings - max delay 250ms */
-#define ICE_CTL_Q_SQ_CMD_TIMEOUT       2500  /* Count 2500 times */
+/* Control Queue timeout settings - max delay 1s */
+#define ICE_CTL_Q_SQ_CMD_TIMEOUT       10000 /* Count 10000 times */
 #define ICE_CTL_Q_SQ_CMD_USEC          100   /* Check every 100usec */
 #define ICE_CTL_Q_ADMIN_INIT_TIMEOUT   10    /* Count 10 times */
 #define ICE_CTL_Q_ADMIN_INIT_MSEC      100   /* Check every 100msec */
@@ -84,7 +84,6 @@ struct ice_rq_event_info {
 /* Control Queue information */
 struct ice_ctl_q_info {
        enum ice_ctl_q qtype;
-       enum ice_aq_err rq_last_status; /* last status on receive queue */
        struct ice_ctl_q_ring rq;       /* receive queue */
        struct ice_ctl_q_ring sq;       /* send queue */
        u32 sq_cmd_timeout;             /* send queue cmd write back timeout */