common/cnxk: add lower bound check for SSO resources

[dpdk.git] / drivers / net / ice / base / ice_flow.c

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index f699dbb..4a73f0c 100644 (file)
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1370,6 +1370,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
        u16 sib_mask = 0;
        u16 mask;
        u16 off;
+       bool exist;
 
        flds = params->prof->segs[seg].fields;
 
@@ -1410,7 +1411,16 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
                break;
        case ICE_FLOW_FIELD_IDX_IPV6_TTL:
        case ICE_FLOW_FIELD_IDX_IPV6_PROT:
-               prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL;
+               prot_id = ICE_PROT_IPV6_NEXT_PROTO;
+               exist = ice_check_ddp_support_proto_id(hw, prot_id);
+               if (!exist)
+                       prot_id = seg == 0 ?
+                                 ICE_PROT_IPV6_OF_OR_S :
+                                 ICE_PROT_IPV6_IL;
+               else
+                       prot_id = seg == 0 ?
+                                 ICE_PROT_IPV6_NEXT_PROTO :
+                                 ICE_PROT_IPV6_IL;
 
                /* TTL and PROT share the same extraction seq. entry.
                 * Each is considered a sibling to the other in terms of sharing
@@ -1543,6 +1553,10 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
        flds[fld].xtrct.disp = (u8)(ice_flds_info[fld].off % ese_bits);
        flds[fld].xtrct.idx = params->es_cnt;
        flds[fld].xtrct.mask = ice_flds_info[fld].mask;
+       if (prot_id == ICE_PROT_IPV6_NEXT_PROTO) {
+               flds[fld].xtrct.off = 0;
+               flds[fld].xtrct.disp = 0;
+       }
 
        /* Adjust the next field-entry index after accommodating the number of
         * entries this field consumes
@@ -2529,9 +2543,9 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
 
 #define FLAG_GTPU_MSK  \
        (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK)
-#define FLAG_GTPU_DW   \
-       (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK)
 #define FLAG_GTPU_UP   \
+       (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK)
+#define FLAG_GTPU_DW   \
        (FLAG_GTP_EH_PDU)
 /**
  * ice_flow_set_hw_prof - Set HW flow profile based on the parsed profile info
@@ -4071,6 +4085,115 @@ ice_rss_update_symm(struct ice_hw *hw,
        }
 }
 
+/**
+ * ice_rss_cfg_raw_symm - configure symmetric hash parameters
+ * for raw pattern
+ * @hw: pointer to the hardware structure
+ * @prof: pointer to parser profile
+ * @prof_id: profile ID
+ *
+ * Calculate symmetric hash parameters based on input protocol type.
+ */
+static void
+ice_rss_cfg_raw_symm(struct ice_hw *hw,
+                    struct ice_parser_profile *prof, u64 prof_id)
+{
+       u8 src_idx, dst_idx, proto_id;
+       int len, i = 0;
+
+       while (i < prof->fv_num) {
+               proto_id = prof->fv[i].proto_id;
+
+               switch (proto_id) {
+               case ICE_PROT_IPV4_OF_OR_S:
+                       len = ICE_FLOW_FLD_SZ_IPV4_ADDR /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_IPV4_SRC_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_IPV4_DST_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               case ICE_PROT_IPV6_OF_OR_S:
+                       len = ICE_FLOW_FLD_SZ_IPV6_ADDR /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_IPV6_SRC_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_IPV6_DST_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               case ICE_PROT_TCP_IL:
+               case ICE_PROT_UDP_IL_OR_S:
+               case ICE_PROT_SCTP_IL:
+                       len = ICE_FLOW_FLD_SZ_PORT /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_SRC_PORT_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_DST_PORT_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               default:
+                       i++;
+                       continue;
+               }
+               ice_rss_config_xor(hw, prof_id, src_idx, dst_idx, len);
+       }
+}
+
+/* Max registers index per packet profile */
+#define ICE_SYMM_REG_INDEX_MAX 6
+
+/**
+ * ice_rss_update_raw_symm - update symmetric hash configuration
+ * for raw pattern
+ * @hw: pointer to the hardware structure
+ * @cfg: configure parameters for raw pattern
+ * @id: profile tracking ID
+ *
+ * Update symmetric hash configuration for raw pattern if required.
+ * Otherwise only clear to default.
+ */
+void
+ice_rss_update_raw_symm(struct ice_hw *hw,
+                       struct ice_rss_raw_cfg *cfg, u64 id)
+{
+       struct ice_prof_map *map;
+       u8 prof_id, m;
+
+       ice_acquire_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
+       map = ice_search_prof_id(hw, ICE_BLK_RSS, id);
+       if (map)
+               prof_id = map->prof_id;
+       ice_release_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
+       if (!map)
+               return;
+       /* clear to default */
+       for (m = 0; m < ICE_SYMM_REG_INDEX_MAX; m++)
+               wr32(hw, GLQF_HSYMM(prof_id, m), 0);
+       if (cfg->symm)
+               ice_rss_cfg_raw_symm(hw, &cfg->prof, prof_id);
+}
+
 /**
  * ice_add_rss_cfg_sync - add an RSS configuration
  * @hw: pointer to the hardware structure