crypto/dpaa_sec: support authonly and chain with raw API

[dpdk.git] / drivers / net / ice / base / ice_nvm.c

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index c807ce9..7860006 100644 (file)
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -1,9 +1,11 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2020 Intel Corporation
+ * Copyright(c) 2001-2021 Intel Corporation
  */
 
 #include "ice_common.h"
 
+#define GL_MNG_DEF_DEVID 0x000B611C
+
 /**
  * ice_aq_read_nvm
  * @hw: pointer to the HW struct
@@ -1077,6 +1079,34 @@ enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
        return status;
 }
 
+/**
+ * ice_nvm_recalculate_checksum
+ * @hw: pointer to the HW struct
+ *
+ * Recalculate NVM PFA checksum (0x0706)
+ */
+enum ice_status ice_nvm_recalculate_checksum(struct ice_hw *hw)
+{
+       struct ice_aqc_nvm_checksum *cmd;
+       struct ice_aq_desc desc;
+       enum ice_status status;
+
+       status = ice_acquire_nvm(hw, ICE_RES_READ);
+       if (status)
+               return status;
+
+       cmd = &desc.params.nvm_checksum;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_checksum);
+       cmd->flags = ICE_AQC_NVM_CHECKSUM_RECALC;
+
+       status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+
+       ice_release_nvm(hw);
+
+       return status;
+}
+
 /**
  * ice_nvm_access_get_features - Return the NVM access features structure
  * @cmd: NVM access command to process
@@ -1175,6 +1205,7 @@ ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
        case GLGEN_CSR_DEBUG_C:
        case GLGEN_RSTAT:
        case GLPCI_LBARCTRL:
+       case GL_MNG_DEF_DEVID:
        case GLNVM_GENS:
        case GLNVM_FLA:
        case PF_FUNC_RID:
@@ -1183,11 +1214,11 @@ ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
                break;
        }
 
-       for (i = 0; i <= ICE_NVM_ACCESS_GL_HIDA_MAX; i++)
+       for (i = 0; i <= GL_HIDA_MAX_INDEX; i++)
                if (offset == (u32)GL_HIDA(i))
                        return ICE_SUCCESS;
 
-       for (i = 0; i <= ICE_NVM_ACCESS_GL_HIBA_MAX; i++)
+       for (i = 0; i <= GL_HIBA_MAX_INDEX; i++)
                if (offset == (u32)GL_HIBA(i))
                        return ICE_SUCCESS;