/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2020 Intel Corporation
+ * Copyright(c) 2001-2021 Intel Corporation
*/
#include "ice_sched.h"
layer, new_num_nodes,
first_teid_ptr,
&num_added);
- *num_nodes_added += num_added;
+ if (status == ICE_SUCCESS)
+ *num_nodes_added += num_added;
+ /* added more nodes than requested ? */
+ if (*num_nodes_added > num_nodes) {
+ ice_debug(pi->hw, ICE_DBG_SCHED, "added extra nodes %d %d\n", num_nodes,
+ *num_nodes_added);
+ status = ICE_ERR_CFG;
+ break;
+ }
/* break if all the nodes are added successfully */
if (status == ICE_SUCCESS && (*num_nodes_added == num_nodes))
break;
if (num_added)
first_teid_ptr = &temp;
- new_num_nodes = num_nodes - num_added;
+ new_num_nodes = num_nodes - *num_nodes_added;
}
}
return status;
ice_memdup(hw, buf->layer_props,
(hw->num_tx_sched_layers *
sizeof(*hw->layer_info)),
- ICE_DMA_TO_DMA);
+ ICE_NONDMA_TO_NONDMA);
if (!hw->layer_info) {
status = ICE_ERR_NO_MEMORY;
goto sched_query_out;
}
/**
- * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
+ * ice_sched_rm_agg_vsi_info - remove aggregator related VSI info entry
* @pi: port information structure
* @vsi_handle: software VSI handle
*
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
u16 vsi_handle, ice_bitmap_t *tc_bitmap)
{
- struct ice_sched_agg_vsi_info *agg_vsi_info;
- struct ice_sched_agg_info *agg_info;
+ struct ice_sched_agg_vsi_info *agg_vsi_info, *old_agg_vsi_info = NULL;
+ struct ice_sched_agg_info *agg_info, *old_agg_info;
enum ice_status status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u8 tc;
agg_info = ice_get_agg_info(hw, agg_id);
if (!agg_info)
return ICE_ERR_PARAM;
+ /* If the vsi is already part of another aggregator then update
+ * its vsi info list
+ */
+ old_agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
+ if (old_agg_info && old_agg_info != agg_info) {
+ struct ice_sched_agg_vsi_info *vtmp;
+
+ LIST_FOR_EACH_ENTRY_SAFE(old_agg_vsi_info, vtmp,
+ &old_agg_info->agg_vsi_list,
+ ice_sched_agg_vsi_info, list_entry)
+ if (old_agg_vsi_info->vsi_handle == vsi_handle)
+ break;
+ }
+
/* check if entry already exist */
agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
if (!agg_vsi_info) {
break;
ice_set_bit(tc, agg_vsi_info->tc_bitmap);
+ if (old_agg_vsi_info)
+ ice_clear_bit(tc, old_agg_vsi_info->tc_bitmap);
+ }
+ if (old_agg_vsi_info && !old_agg_vsi_info->tc_bitmap[0]) {
+ LIST_DEL(&old_agg_vsi_info->list_entry);
+ ice_free(pi->hw, old_agg_vsi_info);
}
return status;
}
u16 num_elems = 1;
buf = *info;
+ /* For TC nodes, CIR config is not supported */
+ if (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_TC)
+ buf.data.valid_sections &= ~ICE_AQC_ELEM_VALID_CIR;
/* Parent TEID is reserved field in this aq call */
buf.parent_teid = 0;
/* Element type is reserved field in this aq call */
}
/**
- * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
+ * ice_cfg_vsi_bw_dflt_lmt_per_tc - configure default VSI BW limit per TC
* @pi: port information structure
* @vsi_handle: software VSI handle
* @tc: traffic class
}
/**
- * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc
+ * ice_cfg_agg_bw_shared_lmt_per_tc - config aggregator BW shared limit per tc
* @pi: port information structure
* @agg_id: aggregator ID
* @tc: traffic class
}
/**
- * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc
+ * ice_cfg_agg_bw_no_shared_lmt_per_tc - cfg aggregator BW shared limit per tc
* @pi: port information structure
* @agg_id: aggregator ID
* @tc: traffic class
}
/**
- * ice_config_vsi_queue_priority - config VSI queue priority of node
+ * ice_cfg_vsi_q_priority - config VSI queue priority of node
* @pi: port information structure
* @num_qs: number of VSI queues
* @q_ids: queue IDs array
LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
ice_sched_agg_vsi_info, list_entry)
if (agg_vsi_info->vsi_handle == vsi_handle) {
- /* cppcheck-suppress unreadVariable */
vsi_handle_valid = true;
break;
}
ice_sched_rm_unused_rl_prof(hw);
layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
- node->tx_sched_layer);
+ node->tx_sched_layer);
if (layer_num >= hw->num_tx_sched_layers)
return ICE_ERR_PARAM;
case ICE_AGG_TYPE_Q:
/* The current implementation allows single queue to modify */
- node = ice_sched_get_node(pi, id);
+ node = ice_sched_find_node_by_teid(pi->root, id);
break;
case ICE_AGG_TYPE_QG:
/* The current implementation allows single qg to modify */
- child_node = ice_sched_get_node(pi, id);
+ child_node = ice_sched_find_node_by_teid(pi->root, id);
if (!child_node)
break;
node = child_node->parent;