/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2019
+ * Copyright(c) 2001-2020 Intel Corporation
*/
#include "ice_sched.h"
-
/**
* ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
* @pi: port information structure
return ICE_ERR_PARAM;
}
- /* query the current node information from FW before additing it
+ /* query the current node information from FW before adding it
* to the SW DB
*/
status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
{
u8 i;
- if (!pi)
+ if (!pi || !pi->root)
return NULL;
for (i = 0; i < pi->root->num_children; i++)
if (pi->root->children[i]->tc_num == tc)
/**
* ice_aq_rl_profile - performs a rate limiting task
* @hw: pointer to the HW struct
- * @opcode:opcode for add, query, or remove profile(s)
+ * @opcode: opcode for add, query, or remove profile(s)
* @num_profiles: the number of profiles
* @buf: pointer to buffer
* @buf_size: buffer size in bytes
* @num_processed: number of processed add or remove profile(s) to return
* @cd: pointer to command details structure
*
- * Rl profile function to add, query, or remove profile(s)
+ * RL profile function to add, query, or remove profile(s)
*/
static enum ice_status
ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
*/
static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
{
- u8 ln;
+ u16 ln;
for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
struct ice_aqc_rl_profile_info *rl_prof_elem;
}
/**
- * ice_sched_clear_tx_topo - clears the schduler tree nodes
+ * ice_sched_clear_tx_topo - clears the scheduler tree nodes
* @pi: port information structure
*
* This function removes all the nodes from HW as well as from SW DB.
hw->layer_info = NULL;
}
- if (hw->port_info)
- ice_sched_clear_port(hw->port_info);
+ ice_sched_clear_port(hw->port_info);
hw->num_tx_sched_layers = 0;
hw->num_tx_sched_phys_layers = 0;
return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
}
-
/**
* ice_sched_add_elems - add nodes to HW and SW DB
* @pi: port information structure
u16 buf_size;
u32 teid;
- buf_size = sizeof(*buf) + sizeof(*buf->generic) * (num_nodes - 1);
+ buf_size = ice_struct_size(buf, generic, num_nodes - 1);
buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
if (!buf)
return ICE_ERR_NO_MEMORY;
goto sched_query_out;
}
-
sched_query_out:
ice_free(hw, buf);
return status;
}
+/**
+ * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
+ * @hw: pointer to the HW struct
+ *
+ * Determine the PSM clock frequency and store in HW struct
+ */
+void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
+{
+ u32 val, clk_src;
+
+ val = rd32(hw, GLGEN_CLKSTAT_SRC);
+ clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
+ GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
+
+#define PSM_CLK_SRC_367_MHZ 0x0
+#define PSM_CLK_SRC_416_MHZ 0x1
+#define PSM_CLK_SRC_446_MHZ 0x2
+#define PSM_CLK_SRC_390_MHZ 0x3
+
+ switch (clk_src) {
+ case PSM_CLK_SRC_367_MHZ:
+ hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
+ break;
+ case PSM_CLK_SRC_416_MHZ:
+ hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
+ break;
+ case PSM_CLK_SRC_446_MHZ:
+ hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
+ break;
+ case PSM_CLK_SRC_390_MHZ:
+ hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
+ break;
+ default:
+ ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
+ clk_src);
+ /* fall back to a safe default */
+ hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
+ }
+}
+
/**
* ice_sched_find_node_in_subtree - Find node in part of base node subtree
* @hw: pointer to the HW struct
/**
* ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
- * @hw: pointer to the HW struct
+ * @pi: pointer to the port information structure
* @tc_node: pointer to the TC node
* @agg_id: aggregator ID
*
* a given TC branch
*/
static struct ice_sched_node *
-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
+ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
u32 agg_id)
{
struct ice_sched_node *node;
+ struct ice_hw *hw = pi->hw;
u8 agg_layer;
+ if (!hw)
+ return NULL;
agg_layer = ice_sched_get_agg_layer(hw);
- node = ice_sched_get_first_node(hw->port_info, tc_node, agg_layer);
+ node = ice_sched_get_first_node(pi, tc_node, agg_layer);
/* Check whether it already exists */
while (node) {
* This function removes single aggregator VSI info entry from
* aggregator list.
*/
-static void
-ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
+static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
{
struct ice_sched_agg_info *agg_info;
struct ice_sched_agg_info *atmp;
return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
}
-
/**
* ice_sched_is_tree_balanced - Check tree nodes are identical or not
* @hw: pointer to the HW struct
* This function validates aggregator ID. The function returns info if
* aggregator ID is present in list otherwise it returns null.
*/
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
{
struct ice_sched_agg_info *agg_info;
ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
u16 num_items, u32 *list)
{
+ enum ice_status status = ICE_SUCCESS;
struct ice_aqc_move_elem *buf;
struct ice_sched_node *node;
- enum ice_status status = ICE_SUCCESS;
+ u16 i, grps_movd = 0;
struct ice_hw *hw;
- u16 grps_movd = 0;
- u8 i;
hw = pi->hw;
if (!tc_node)
return ICE_ERR_CFG;
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
return ICE_ERR_DOES_NOT_EXIST;
if (!tc_node)
return ICE_ERR_CFG;
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
return ICE_ERR_DOES_NOT_EXIST;
if (!tc_node)
return ICE_ERR_CFG;
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
/* Does Agg node already exist ? */
if (agg_node)
return status;
* The function returns aggregator VSI info based on VSI handle. This function
* needs to be called with scheduler lock held.
*/
-static struct ice_sched_agg_vsi_info*
+static struct ice_sched_agg_vsi_info *
ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
{
struct ice_sched_agg_vsi_info *agg_vsi_info;
* VSI has in this case a different aggregator than the default one. This
* function needs to be called with scheduler lock held.
*/
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
{
struct ice_sched_agg_info *agg_info;
*/
static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
{
- u8 ln;
+ u16 ln;
for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
struct ice_aqc_rl_profile_info *rl_prof_elem;
*/
static enum ice_status
ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
- enum ice_rl_type rl_type, u8 bw_alloc)
+ enum ice_rl_type rl_type, u16 bw_alloc)
{
struct ice_aqc_txsched_elem_data buf;
struct ice_aqc_txsched_elem *data;
*
* Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
*/
-static void
-ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
{
if (bw == ICE_SCHED_DFLT_BW) {
ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
*
* Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
*/
-static void
-ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
{
if (bw == ICE_SCHED_DFLT_BW) {
ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
*
* Save or clear shared bandwidth (BW) in the passed param bw_t_info.
*/
-static void
-ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
{
if (bw == ICE_SCHED_DFLT_BW) {
ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
*
* Save or clear priority (prio) in the passed param bw_t_info.
*/
-static void
-ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
+static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
{
bw_t_info->generic = prio;
if (bw_t_info->generic)
* @pi: port information structure
* @num_qs: number of VSI queues
* @q_ids: queue IDs array
- * @q_ids: queue IDs array
* @q_prio: queue priority array
*
* This function configures the queue node priority (Sibling Priority) of the
u8 *q_prio)
{
enum ice_status status = ICE_ERR_PARAM;
- struct ice_hw *hw = pi->hw;
u16 i;
ice_acquire_lock(&pi->sched_lock);
break;
}
/* Configure Priority */
- status = ice_sched_cfg_sibl_node_prio(hw, node, q_prio[i]);
+ status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
if (status)
break;
}
if (!tc_node)
goto exit_agg_priority_per_tc;
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
goto exit_agg_priority_per_tc;
if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
/* Configure Priority */
- status = ice_sched_cfg_sibl_node_prio(hw, vsi_node,
+ status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
node_prio[i]);
if (status)
break;
if (!tc_node)
continue;
- agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
continue;
/**
* ice_sched_calc_wakeup - calculate RL profile wakeup parameter
+ * @hw: pointer to the HW struct
* @bw: bandwidth in Kbps
*
* This function calculates the wakeup parameter of RL profile.
*/
-static u16 ice_sched_calc_wakeup(s32 bw)
+static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
{
s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
s32 wakeup_f_int;
/* Get the wakeup integer value */
bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
- wakeup_int = DIV_64BIT(ICE_RL_PROF_FREQUENCY, bytes_per_sec);
+ wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
if (wakeup_int > 63) {
wakeup = (u16)((1 << 15) | wakeup_int);
} else {
*/
wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
- ICE_RL_PROF_FREQUENCY, bytes_per_sec);
+ hw->psm_clk_freq, bytes_per_sec);
/* Get Fraction value */
wakeup_f = wakeup_a - wakeup_b;
/**
* ice_sched_bw_to_rl_profile - convert BW to profile parameters
+ * @hw: pointer to the HW struct
* @bw: bandwidth in Kbps
* @profile: profile parameters to return
*
* This function converts the BW to profile structure format.
*/
static enum ice_status
-ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
+ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
+ struct ice_aqc_rl_profile_elem *profile)
{
enum ice_status status = ICE_ERR_PARAM;
s64 bytes_per_sec, ts_rate, mv_tmp;
for (i = 0; i < 64; i++) {
u64 pow_result = BIT_ULL(i);
- ts_rate = DIV_64BIT((s64)ICE_RL_PROF_FREQUENCY,
+ ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
pow_result * ICE_RL_PROF_TS_MULTIPLIER);
if (ts_rate <= 0)
continue;
if (found) {
u16 wm;
- wm = ice_sched_calc_wakeup(bw);
+ wm = ice_sched_calc_wakeup(hw, bw);
profile->rl_multiply = CPU_TO_LE16(mv);
profile->wake_up_calc = CPU_TO_LE16(wm);
profile->rl_encode = CPU_TO_LE16(encode);
struct ice_aqc_rl_profile_generic_elem *buf;
struct ice_aqc_rl_profile_info *rl_prof_elem;
u16 profiles_added = 0, num_profiles = 1;
- enum ice_status status = ICE_ERR_PARAM;
+ enum ice_status status;
struct ice_hw *hw;
u8 profile_type;
+ if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
+ return NULL;
switch (rl_type) {
case ICE_MIN_BW:
profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
hw = pi->hw;
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
- if (rl_prof_elem->profile.flags == profile_type &&
- rl_prof_elem->bw == bw)
+ if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+ profile_type && rl_prof_elem->bw == bw)
/* Return existing profile ID info */
return rl_prof_elem;
if (!rl_prof_elem)
return NULL;
- status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile);
+ status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
if (status != ICE_SUCCESS)
goto exit_add_rl_prof;
struct ice_aqc_rl_profile_info *rl_prof_elem;
enum ice_status status = ICE_SUCCESS;
+ if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
+ return ICE_ERR_PARAM;
/* Check the existing list for RL profile */
LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
ice_aqc_rl_profile_info, list_entry)
- if (rl_prof_elem->profile.flags == profile_type &&
+ if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+ profile_type &&
LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
profile_id) {
if (rl_prof_elem->prof_id_ref)
return ICE_SUCCESS;
return ice_sched_rm_rl_profile(pi, layer_num,
- rl_prof_info->profile.flags,
- old_id);
+ rl_prof_info->profile.flags &
+ ICE_AQC_RL_PROFILE_TYPE_M, old_id);
}
/**
ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
- struct ice_hw *hw = pi->hw;
-
if (tc >= ICE_MAX_TRAFFIC_CLASS)
return ICE_ERR_PARAM;
switch (rl_type) {
case ICE_MIN_BW:
- ice_set_clear_cir_bw(&hw->tc_node_bw_t_info[tc], bw);
+ ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
break;
case ICE_MAX_BW:
- ice_set_clear_eir_bw(&hw->tc_node_bw_t_info[tc], bw);
+ ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
break;
case ICE_SHARED_BW:
- ice_set_clear_shared_bw(&hw->tc_node_bw_t_info[tc], bw);
+ ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
break;
default:
return ICE_ERR_PARAM;
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u16 bw_alloc)
{
- struct ice_hw *hw = pi->hw;
-
if (tc >= ICE_MAX_TRAFFIC_CLASS)
return ICE_ERR_PARAM;
switch (rl_type) {
case ICE_MIN_BW:
- ice_set_clear_cir_bw_alloc(&hw->tc_node_bw_t_info[tc],
+ ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
bw_alloc);
break;
case ICE_MAX_BW:
- ice_set_clear_eir_bw_alloc(&hw->tc_node_bw_t_info[tc],
+ ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
bw_alloc);
break;
default:
tc_node = ice_sched_get_tc_node(pi, tc);
if (tc_node)
- node = ice_sched_get_agg_node(pi->hw, tc_node, id);
+ node = ice_sched_get_agg_node(pi, tc_node, id);
break;
}
if (!tc_node)
continue;
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
continue;
/* SRL bandwidth layer selection */
if (!tc_node)
continue;
- agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
+ agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
if (!agg_node)
continue;
/**
* ice_sched_cfg_sibl_node_prio - configure node sibling priority
- * @hw: pointer to the HW struct
+ * @pi: port information structure
* @node: sched node to configure
* @priority: sibling priority
*
* function needs to be called with scheduler lock held.
*/
enum ice_status
-ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
- u8 priority)
+ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
+ struct ice_sched_node *node, u8 priority)
{
struct ice_aqc_txsched_elem_data buf;
struct ice_aqc_txsched_elem *data;
+ struct ice_hw *hw = pi->hw;
enum ice_status status;
+ if (!hw)
+ return ICE_ERR_PARAM;
buf = node->info;
data = &buf.data;
data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
return ICE_SUCCESS;
}
-/*
+/**
* ice_sched_replay_node_prio - re-configure node priority
* @hw: pointer to the HW struct
* @node: sched node to configure
status = ICE_ERR_PARAM;
break;
}
- agg_node = ice_sched_get_agg_node(hw, tc_node,
+ agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
agg_info->agg_id);
if (!agg_node) {
status = ICE_ERR_PARAM;
ICE_MAX_TRAFFIC_CLASS);
enum ice_status status;
- ice_zero_bitmap(replay_bitmap,
- sizeof(replay_bitmap) * BITS_PER_BYTE);
+ ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
ice_sched_get_ena_tc_bitmap(pi,
agg_info->replay_tc_bitmap,
replay_bitmap);
/**
* ice_sched_replay_tc_node_bw - replay TC node(s) BW
- * @hw: pointer to the HW struct
+ * @pi: port information structure
*
- * This function replay TC nodes. The caller needs to hold the scheduler lock.
+ * This function replay TC nodes.
*/
-enum ice_status
-ice_sched_replay_tc_node_bw(struct ice_hw *hw)
+enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
{
- struct ice_port_info *pi = hw->port_info;
enum ice_status status = ICE_SUCCESS;
u8 tc;
+ if (!pi->hw)
+ return ICE_ERR_PARAM;
ice_acquire_lock(&pi->sched_lock);
ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node;
- tc_node = ice_sched_get_tc_node(hw->port_info, tc);
+ tc_node = ice_sched_get_tc_node(pi, tc);
if (!tc_node)
continue; /* TC not present */
- status = ice_sched_replay_node_bw(hw, tc_node,
- &hw->tc_node_bw_t_info[tc]);
+ status = ice_sched_replay_node_bw(pi->hw, tc_node,
+ &pi->tc_node_bw_t_info[tc]);
if (status)
break;
}
struct ice_sched_agg_info *agg_info;
enum ice_status status;
- ice_zero_bitmap(replay_bitmap, sizeof(replay_bitmap) * BITS_PER_BYTE);
+ ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
* This function replays association of VSI to aggregator type nodes, and
* node bandwidth information.
*/
-enum ice_status
-ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
{
struct ice_port_info *pi = hw->port_info;
enum ice_status status;
git.droids-corp.org / dpdk.git / blobdiff