net/ice/base: cache NVM module bank information

[dpdk.git] / drivers / net / ice / base / ice_type.h

diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 9e9a219..1e1c672 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -518,10 +518,33 @@ struct ice_nvm_info {
        u8 minor;
 };
 
+/* Enumeration of possible flash banks for the NVM, OROM, and Netlist modules
+ * of the flash image.
+ */
+enum ice_flash_bank {
+       ICE_INVALID_FLASH_BANK,
+       ICE_1ST_FLASH_BANK,
+       ICE_2ND_FLASH_BANK,
+};
+
+/* information for accessing NVM, OROM, and Netlist flash banks */
+struct ice_bank_info {
+       u32 nvm_ptr;                            /* Pointer to 1st NVM bank */
+       u32 nvm_size;                           /* Size of NVM bank */
+       u32 orom_ptr;                           /* Pointer to 1st OROM bank */
+       u32 orom_size;                          /* Size of OROM bank */
+       u32 netlist_ptr;                        /* Pointer to 1st Netlist bank */
+       u32 netlist_size;                       /* Size of Netlist bank */
+       enum ice_flash_bank nvm_bank;           /* Active NVM bank */
+       enum ice_flash_bank orom_bank;          /* Active OROM bank */
+       enum ice_flash_bank netlist_bank;       /* Active Netlist bank */
+};
+
 /* Flash Chip Information */
 struct ice_flash_info {
        struct ice_orom_info orom;      /* Option ROM version info */
        struct ice_nvm_info nvm;        /* NVM version information */
+       struct ice_bank_info banks;     /* Flash Bank information */
        u16 sr_words;                   /* Shadow RAM size in words */
        u32 flash_size;                 /* Size of available flash in bytes */
        u8 blank_nvm_mode;              /* is NVM empty (no FW present) */
@@ -1099,6 +1122,12 @@ enum ice_sw_fwd_act_type {
 #define ICE_SR_PCIE_ALT_SIZE_WORDS     512
 #define ICE_SR_CTRL_WORD_1_S           0x06
 #define ICE_SR_CTRL_WORD_1_M           (0x03 << ICE_SR_CTRL_WORD_1_S)
+#define ICE_SR_CTRL_WORD_VALID         0x1
+#define ICE_SR_CTRL_WORD_OROM_BANK     BIT(3)
+#define ICE_SR_CTRL_WORD_NETLIST_BANK  BIT(4)
+#define ICE_SR_CTRL_WORD_NVM_BANK      BIT(5)
+
+#define ICE_SR_NVM_PTR_4KB_UNITS       BIT(15)
 
 /* Shadow RAM related */
 #define ICE_SR_SECTOR_SIZE_IN_WORDS    0x800