net/ice/base: support external device secure programming

[dpdk.git] / drivers / net / ice / base / ice_type.h

diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 86e93c3..414424b 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2020 Intel Corporation
+ * Copyright(c) 2001-2021 Intel Corporation
  */
 
 #ifndef _ICE_TYPE_H_
@@ -304,8 +304,26 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_NONF_IPV4_TCP,
        ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
        ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_TCP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
        ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
@@ -994,8 +1012,8 @@ struct ice_hw {
        ice_declare_bitmap(fdir_perfect_fltr, ICE_FLTR_PTYPE_MAX);
        struct ice_lock rss_locks;      /* protect RSS configuration */
        struct LIST_HEAD_TYPE rss_list_head;
-       struct ice_vlan_mode_ops vlan_mode_ops;
        ice_declare_bitmap(hw_ptype, ICE_FLOW_PTYPE_MAX);
+       u8 dvm_ena;
 };
 
 /* Statistics collected by each port, VSI, VEB, and S-channel */