net/ice: fix flow FDIR/switch memory leak

[dpdk.git] / drivers / net / ice / base / ice_type.h

diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 541e298..9773a54 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -14,14 +14,22 @@
 
 #define BITS_PER_BYTE  8
 
-#ifndef _FORCE_
 #define _FORCE_
-#endif
 
 #define ICE_BYTES_PER_WORD     2
 #define ICE_BYTES_PER_DWORD    4
 #define ICE_MAX_TRAFFIC_CLASS  8
 
+/**
+ * ROUND_UP - round up to next arbitrary multiple (not a power of 2)
+ * @a: value to round up
+ * @b: arbitrary multiple
+ *
+ * Round up to the next multiple of the arbitrary b.
+ * Note, when b is a power of 2 use ICE_ALIGN() instead.
+ */
+#define ROUND_UP(a, b) ((b) * DIVIDE_AND_ROUND_UP((a), (b)))
+
 #define MIN_T(_t, _a, _b)      min((_t)(_a), (_t)(_b))
 
 #define IS_ASCII(_ch)  ((_ch) < 0x80)
@@ -36,6 +44,30 @@
 #include "ice_flex_type.h"
 #include "ice_protocol_type.h"
 
+/**
+ * ice_is_pow2 - check if integer value is a power of 2
+ * @val: unsigned integer to be validated
+ */
+static inline bool ice_is_pow2(u64 val)
+{
+       return (val && !(val & (val - 1)));
+}
+
+/**
+ * ice_ilog2 - Calculates integer log base 2 of a number
+ * @n: number on which to perform operation
+ */
+static inline int ice_ilog2(u64 n)
+{
+       int i;
+
+       for (i = 63; i >= 0; i--)
+               if (((u64)1 << i) & n)
+                       return i;
+
+       return -1;
+}
+
 static inline bool ice_is_tc_ena(ice_bitmap_t bitmap, u8 tc)
 {
        return ice_is_bit_set(&bitmap, tc);
@@ -96,13 +128,12 @@ static inline u32 ice_round_to_num(u32 N, u32 R)
 #define ICE_DBG_USER           BIT_ULL(31)
 #define ICE_DBG_ALL            0xFFFFFFFFFFFFFFFFULL
 
-#ifndef __ALWAYS_UNUSED
 #define __ALWAYS_UNUSED
-#endif
-
-
-
 
+#define IS_ETHER_ADDR_EQUAL(addr1, addr2) \
+       (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \
+        ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \
+        ((bool)((((u16 *)(addr1))[2] == ((u16 *)(addr2))[2]))))
 
 enum ice_aq_res_ids {
        ICE_NVM_RES_ID = 1,
@@ -253,6 +284,10 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_NONF_IPV4_TCP,
        ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
        ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
        ICE_FLTR_PTYPE_FRAG_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV6_UDP,
        ICE_FLTR_PTYPE_NONF_IPV6_TCP,
@@ -261,13 +296,19 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_MAX,
 };
 
+enum ice_fd_hw_seg {
+       ICE_FD_HW_SEG_NON_TUN = 0,
+       ICE_FD_HW_SEG_TUN,
+       ICE_FD_HW_SEG_MAX,
+};
+
 /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */
 #define ICE_MAX_FDIR_VSI_PER_FILTER    2
 
 struct ice_fd_hw_prof {
-       struct ice_flow_seg_info *fdir_seg;
+       struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX];
        int cnt;
-       u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER];
+       u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX];
        u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER];
 };
 
@@ -345,7 +386,6 @@ struct ice_hw_common_caps {
        u8 proxy_support;
 };
 
-
 /* Function specific capabilities */
 struct ice_hw_func_caps {
        struct ice_hw_common_caps common_cap;
@@ -362,7 +402,6 @@ struct ice_hw_dev_caps {
        u32 num_funcs;
 };
 
-
 /* Information about MAC such as address, etc... */
 struct ice_mac_info {
        u8 lan_addr[ETH_ALEN];
@@ -528,7 +567,6 @@ enum ice_rl_type {
 #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc)
 #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode)
 
-
 /* The following tree example shows the naming conventions followed under
  * ice_port_info struct for default scheduler tree topology.
  *
@@ -688,8 +726,10 @@ struct ice_port_info {
 struct ice_switch_info {
        struct LIST_HEAD_TYPE vsi_list_map_head;
        struct ice_sw_recipe *recp_list;
-};
+       u16 prof_res_bm_init;
 
+       ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS);
+};
 
 /* Port hardware description */
 struct ice_hw {
@@ -748,9 +788,8 @@ struct ice_hw {
        u8 fw_patch;            /* firmware patch version */
        u32 fw_build;           /* firmware build number */
 
-
 /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL
- * register. Used for determining the itr/intrl granularity during
+ * register. Used for determining the ITR/INTRL granularity during
  * initialization.
  */
 #define ICE_MAX_AGG_BW_200G    0x0
@@ -795,11 +834,6 @@ struct ice_hw {
        /* tunneling info */
        struct ice_tunnel_table tnl;
 
-#define ICE_PKG_FILENAME       "package_file"
-#define ICE_PKG_FILENAME_EXT   "pkg"
-#define ICE_PKG_FILE_MAJ_VER   1
-#define ICE_PKG_FILE_MIN_VER   0
-
        /* HW block tables */
        struct ice_blk_info blk[ICE_BLK_COUNT];
        struct ice_lock fl_profs_locks[ICE_BLK_COUNT];  /* lock fltr profiles */