net/ice/base: check RSS flow profile list

[dpdk.git] / drivers / net / ice / base / ice_type.h

diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index bc1ba60..ca88931 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -14,6 +14,10 @@
 
 #define BITS_PER_BYTE  8
 
+#ifndef _FORCE_
+#define _FORCE_
+#endif
+
 #define ICE_BYTES_PER_WORD     2
 #define ICE_BYTES_PER_DWORD    4
 #define ICE_MAX_TRAFFIC_CLASS  8
@@ -23,7 +27,7 @@
 #endif
 
 #ifndef IS_ASCII
-#define IS_ASCII(_ch)  ((_ch) < 0x80)
+#define IS_ASCII(_ch)  ((_ch) < 0x80)
 #endif
 
 #include "ice_status.h"
@@ -70,7 +74,7 @@ static inline u32 ice_round_to_num(u32 N, u32 R)
 /* debug masks - set these bits in hw->debug_mask to control output */
 #define ICE_DBG_INIT           BIT_ULL(1)
 #define ICE_DBG_RELEASE                BIT_ULL(2)
-
+#define ICE_DBG_FW_LOG         BIT_ULL(3)
 #define ICE_DBG_LINK           BIT_ULL(4)
 #define ICE_DBG_PHY            BIT_ULL(5)
 #define ICE_DBG_QCTX           BIT_ULL(6)
@@ -261,8 +265,8 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_MAX,
 };
 
-/* 6 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL + 4 ICE_VSI_CHNL */
-#define ICE_MAX_FDIR_VSI_PER_FILTER    6
+/* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */
+#define ICE_MAX_FDIR_VSI_PER_FILTER    2
 
 struct ice_fd_hw_prof {
        struct ice_flow_seg_info *fdir_seg;
@@ -667,6 +671,8 @@ struct ice_port_info {
        struct ice_mac_info mac;
        struct ice_phy_info phy;
        struct ice_lock sched_lock;     /* protect access to TXSched tree */
+       struct ice_sched_node *
+               sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];
        /* List contain profile ID(s) and other params per layer */
        struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
        struct ice_dcbx_cfg local_dcbx_cfg;     /* Oper/Local Cfg */
@@ -726,6 +732,7 @@ struct ice_hw {
        u8 pf_id;               /* device profile info */
 
        u16 max_burst_size;     /* driver sets this value */
+
        /* Tx Scheduler values */
        u16 num_tx_sched_layers;
        u16 num_tx_sched_phys_layers;