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net/ice/base: fix build with GCC 12
[dpdk.git] / drivers / net / ice / base / ice_type.h
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index f7aa5f6..d819846 100644 (file)
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -141,6 +141,7 @@ static inline u32 ice_round_to_num(u32 N, u32 R)
                                 ICE_DBG_AQ_DESC        | \
                                 ICE_DBG_AQ_DESC_BUF    | \
                                 ICE_DBG_AQ_CMD)
+#define ICE_DBG_PARSER         BIT_ULL(28)
 
 #define ICE_DBG_USER           BIT_ULL(31)
 #define ICE_DBG_ALL            0xFFFFFFFFFFFFFFFFULL
@@ -306,28 +307,37 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
        ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU,
-       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH,
-       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW,
-       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP,
-       ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
-       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH,
-       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_DW,
-       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_UP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_UDP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_UP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
        ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
        ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
@@ -364,6 +374,118 @@ enum ice_fltr_ptype {
        ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6,
        ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_UDP,
        ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_DW_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_DW_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_DW_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_DW_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV4_GTPU_EH_UP_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV4_GRE_IPV6_GTPU_EH_UP_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV4_GTPU_EH_UP_IPV6_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV4,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV4_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV4_TCP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV6,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV6_UDP,
+       ICE_FLTR_PTYPE_NONF_IPV6_GRE_IPV6_GTPU_EH_UP_IPV6_TCP,
        ICE_FLTR_PTYPE_NONF_IPV6_UDP,
        ICE_FLTR_PTYPE_NONF_IPV6_TCP,
        ICE_FLTR_PTYPE_NONF_IPV6_SCTP,
@@ -471,6 +593,10 @@ struct ice_hw_common_caps {
 #define ICE_NVM_MGMT_SEC_REV_DISABLED          BIT(0)
 #define ICE_NVM_MGMT_UPDATE_DISABLED           BIT(1)
 #define ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT       BIT(3)
+       /* PCIe reset avoidance */
+       bool pcie_reset_avoidance; /* false: not supported, true: supported */
+       /* Post update reset restriction */
+       bool reset_restrict_support; /* false: not supported, true: supported */
 
        /* External topology device images within the NVM */
 #define ICE_EXT_TOPO_DEV_IMG_COUNT     4
@@ -1007,6 +1133,7 @@ struct ice_hw {
        u8 revision_id;
 
        u8 pf_id;               /* device profile info */
+       u8 logical_pf_id;
 
        u16 max_burst_size;     /* driver sets this value */
 
@@ -1069,7 +1196,8 @@ struct ice_hw {
        /* INTRL granularity in 1 us */
        u8 intrl_gran;
 
-       u8 ucast_shared;        /* true if VSIs can share unicast addr */
+       /* true if VSIs can share unicast MAC addr */
+       u8 umac_shared;
 
 #define ICE_PHY_PER_NAC                1
 #define ICE_MAX_QUAD           2
@@ -1081,6 +1209,7 @@ struct ice_hw {
 
        /* Active package version (currently active) */
        struct ice_pkg_ver active_pkg_ver;
+       u32 pkg_seg_id;
        u32 active_track_id;
        u8 active_pkg_name[ICE_PKG_NAME_SIZE];
        u8 active_pkg_in_nvm;
@@ -1133,6 +1262,7 @@ struct ice_hw {
        struct LIST_HEAD_TYPE rss_list_head;
        ice_declare_bitmap(hw_ptype, ICE_FLOW_PTYPE_MAX);
        u8 dvm_ena;
+       __le16 io_expander_handle;
 };
 
 /* Statistics collected by each port, VSI, VEB, and S-channel */
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