net/mlx5: add C++ include guard to public header

[dpdk.git] / drivers / net / ice / ice_dcf.c

diff --git a/drivers/net/ice/ice_dcf.c b/drivers/net/ice/ice_dcf.c
index e3fb591..7f0c074 100644 (file)
--- a/drivers/net/ice/ice_dcf.c
+++ b/drivers/net/ice/ice_dcf.c
@@ -166,7 +166,7 @@ ice_dcf_handle_virtchnl_msg(struct ice_dcf_hw *hw)
        info.buf_len = ICE_DCF_AQ_BUF_SZ;
        info.msg_buf = hw->arq_buf;
 
-       while (pending) {
+       while (pending && !hw->resetting) {
                ret = iavf_clean_arq_element(&hw->avf, &info, &pending);
                if (ret != IAVF_SUCCESS)
                        break;
@@ -337,6 +337,9 @@ ice_dcf_mode_disable(struct ice_dcf_hw *hw)
 {
        int err;
 
+       if (hw->resetting)
+               return 0;
+
        err = ice_dcf_send_cmd_req_no_irq(hw, VIRTCHNL_OP_DCF_DISABLE,
                                          NULL, 0);
        if (err) {
@@ -531,17 +534,28 @@ int
 ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)
 {
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(hw->eth_dev);
-       int err = 0;
+       int i = 0;
+       int err = -1;
 
        rte_spinlock_lock(&hw->vc_cmd_send_lock);
 
-       rte_intr_disable(&pci_dev->intr_handle);
+       rte_intr_disable(pci_dev->intr_handle);
        ice_dcf_disable_irq0(hw);
 
-       if (ice_dcf_get_vf_resource(hw) || ice_dcf_get_vf_vsi_map(hw) < 0)
-               err = -1;
+       for (;;) {
+               if (ice_dcf_get_vf_resource(hw) == 0 &&
+                   ice_dcf_get_vf_vsi_map(hw) >= 0) {
+                       err = 0;
+                       break;
+               }
+
+               if (++i >= ICE_DCF_ARQ_MAX_RETRIES)
+                       break;
+
+               rte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);
+       }
 
-       rte_intr_enable(&pci_dev->intr_handle);
+       rte_intr_enable(pci_dev->intr_handle);
        ice_dcf_enable_irq0(hw);
 
        rte_spinlock_unlock(&hw->vc_cmd_send_lock);
@@ -579,6 +593,8 @@ ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
        int ret, size;
 
+       hw->resetting = false;
+
        hw->avf.hw_addr = pci_dev->mem_resource[0].addr;
        hw->avf.back = hw;
 
@@ -680,9 +696,9 @@ ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
        }
 
        hw->eth_dev = eth_dev;
-       rte_intr_callback_register(&pci_dev->intr_handle,
+       rte_intr_callback_register(pci_dev->intr_handle,
                                   ice_dcf_dev_interrupt_handler, hw);
-       rte_intr_enable(&pci_dev->intr_handle);
+       rte_intr_enable(pci_dev->intr_handle);
        ice_dcf_enable_irq0(hw);
 
        return 0;
@@ -704,7 +720,7 @@ void
 ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
 {
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
-       struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+       struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
 
        if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)
                if (hw->tm_conf.committed) {
@@ -721,11 +737,25 @@ ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)
        iavf_shutdown_adminq(&hw->avf);
 
        rte_free(hw->arq_buf);
+       hw->arq_buf = NULL;
+
        rte_free(hw->vf_vsi_map);
+       hw->vf_vsi_map = NULL;
+
        rte_free(hw->vf_res);
+       hw->vf_res = NULL;
+
        rte_free(hw->rss_lut);
+       hw->rss_lut = NULL;
+
        rte_free(hw->rss_key);
+       hw->rss_key = NULL;
+
        rte_free(hw->qos_bw_cfg);
+       hw->qos_bw_cfg = NULL;
+
+       rte_free(hw->ets_config);
+       hw->ets_config = NULL;
 }
 
 static int
@@ -807,7 +837,7 @@ ice_dcf_init_rss(struct ice_dcf_hw *hw)
                PMD_DRV_LOG(DEBUG, "RSS is not supported");
                return -ENOTSUP;
        }
-       if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
+       if (dev->data->dev_conf.rxmode.mq_mode != RTE_ETH_MQ_RX_RSS) {
                PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default");
                /* set all lut items to default queue */
                memset(hw->rss_lut, 0, hw->vf_res->rss_lut_size);
@@ -834,7 +864,7 @@ ice_dcf_init_rss(struct ice_dcf_hw *hw)
                        j = 0;
                hw->rss_lut[i] = j;
        }
-       /* send virtchnnl ops to configure rss*/
+       /* send virtchnl ops to configure RSS */
        ret = ice_dcf_configure_rss_lut(hw);
        if (ret)
                return ret;
@@ -1009,6 +1039,9 @@ ice_dcf_disable_queues(struct ice_dcf_hw *hw)
        struct dcf_virtchnl_cmd args;
        int err;
 
+       if (hw->resetting)
+               return 0;
+
        memset(&queue_select, 0, sizeof(queue_select));
        queue_select.vsi_id = hw->vsi_res->vsi_id;
 
@@ -1063,6 +1096,14 @@ ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw, bool add)
        struct dcf_virtchnl_cmd args;
        int len, err = 0;
 
+       if (hw->resetting) {
+               if (!add)
+                       return 0;
+
+               PMD_DRV_LOG(ERR, "fail to add all MACs for VF resetting");
+               return -EIO;
+       }
+
        len = sizeof(struct virtchnl_ether_addr_list);
        addr = hw->eth_dev->data->mac_addrs;
        len += sizeof(struct virtchnl_ether_addr);